Commit 1c622002 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: add a new register define for APU in VI.



the ixcurrent_pg_status addr is different between APU and DGPU.

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 170d6e94
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+6 −2
Original line number Diff line number Diff line
@@ -1068,8 +1068,12 @@ static void uvd_v6_0_get_clockgating_state(void *handle, u32 *flags)

	mutex_lock(&adev->pm.mutex);

	if (RREG32_SMC(ixCURRENT_PG_STATUS) &
				CURRENT_PG_STATUS__UVD_PG_STATUS_MASK) {
	if (adev->flags & AMD_IS_APU)
		data = RREG32_SMC(ixCURRENT_PG_STATUS_APU);
	else
		data = RREG32_SMC(ixCURRENT_PG_STATUS);

	if (data & CURRENT_PG_STATUS__UVD_PG_STATUS_MASK) {
		DRM_INFO("Cannot get clockgating state when UVD is powergated.\n");
		goto out;
	}
+6 −2
Original line number Diff line number Diff line
@@ -783,8 +783,12 @@ static void vce_v3_0_get_clockgating_state(void *handle, u32 *flags)

	mutex_lock(&adev->pm.mutex);

	if (RREG32_SMC(ixCURRENT_PG_STATUS) &
			CURRENT_PG_STATUS__VCE_PG_STATUS_MASK) {
	if (adev->flags & AMD_IS_APU)
		data = RREG32_SMC(ixCURRENT_PG_STATUS_APU);
	else
		data = RREG32_SMC(ixCURRENT_PG_STATUS);

	if (data & CURRENT_PG_STATUS__VCE_PG_STATUS_MASK) {
		DRM_INFO("Cannot get clockgating state when VCE is powergated.\n");
		goto out;
	}
+1 −0
Original line number Diff line number Diff line
@@ -1272,5 +1272,6 @@
#define ixROM_SW_DATA_63                                                        0xc0600120
#define ixROM_SW_DATA_64                                                        0xc0600124
#define ixCURRENT_PG_STATUS                                                     0xc020029c
#define ixCURRENT_PG_STATUS_APU                                                 0xd020029c

#endif /* SMU_7_1_2_D_H */
+2 −0
Original line number Diff line number Diff line
@@ -1245,4 +1245,6 @@
#define ixGC_CAC_ACC_CU15                                                       0xc9
#define ixGC_CAC_OVRD_CU                                                        0xe7
#define ixCURRENT_PG_STATUS                                                     0xc020029c
#define ixCURRENT_PG_STATUS_APU                                                 0xd020029c

#endif /* SMU_7_1_3_D_H */