Commit 72b3e249 authored Oct 18, 2013 by Linus Walleij

ARM: ux500: fix I2C4 clock bit



The PCLK for I2C4 is controlled by bit 10 in the PCKEN registers
while the KCLK is controlled by bit 9 on the KCKEN, it's
one of these odd assymetric things. Correct the PCLK bit to 10.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

parent d591640a

arch/arm/boot/dts/ste-dbx5x0.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -694,7 +694,7 @@

		clock-frequency = <400000>;

		clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;
		clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>;
		clock-names = "i2cclk", "apb_pclk";
		};

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