Commit d591640a authored Oct 18, 2013 by Linus Walleij

ARM: ux500: fix clock for GPIO blocks 6 and 7



The clock assignment in the device tree for GPIO blocks 6
and 7 was incorrect, indicating this was managed by bit 1 on
PRCC 2 while it was in fact bit 11 on PRCC 2.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

parent f5ff9a11

arch/arm/boot/dts/ste-dbx5x0.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -197,7 +197,7 @@
		#gpio-cells = <2>;
		gpio-bank = <6>;

		clocks = <&prcc_pclk 2 1>;
		clocks = <&prcc_pclk 2 11>;
		};

		gpio7: gpio@8011e080 {
		@@ -212,7 +212,7 @@
		#gpio-cells = <2>;
		gpio-bank = <7>;

		clocks = <&prcc_pclk 2 1>;
		clocks = <&prcc_pclk 2 11>;
		};

		gpio8: gpio@a03fe000 {

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