Commit 71f8e5b2 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'dt' of git://github.com/hzhuang1/linux into next/dt 

From Haojian Zhuang <haojian.zhuang@gmail.com>:

Device Tree conversion patches for PXA and MMP, version 4

v4:
1. remove pinctrl patches for pxa.

v3:
1. Revert d03c1990c9681047bf94caa497c41172b3f28351 GPIO: gpio-pxa: fix
devicetree functions
since it's merged into Linus' gpio tree.

v2:
1. Add Linus's Ack in pinctrl driver.
2. Add chao's & haojian's patches for Tauros2 cache.

* 'dt' of git://github.com/hzhuang1/linux

:
  ARM: mmp: enable tauros2 cache in mmp2 dt
  ARM: mmp: enable tauros2 cache in pxa910
  ARM: cache: add dt support for tauros2 cache
  ARM: mmp&dove: modify tauros2_init call
  ARM: cache: add extra feature enable for tauros2
  ARM: cache: add cputype.h for tauros2
  ARM: cache: fix uninitialized ptr in tauros2_init
  gpio: pxa: add chain_eneter and chain_exit for irq handler
  ARM: pxa: support CKENC in clk_enable
  ARM: pxa: add .dtsi files
  ARM: pxa3xx: add generic DT machine code
  ARM: pxa3xx: skip default device initialization when booting via DT
  ARM: pxa: add devicetree code for irq handling
  GPIO: gpio-pxa: simplify pxa_gpio_to_irq() and pxa_irq_to_chip()
  MTD: pxa3xx-nand: add devicetree bindings
  RTC: add DT bindings to pxa-rtc

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 0d7614f0 51931b37

Documentation/devicetree/bindings/arm/mrvl/tauros2.txt

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* Marvell Tauros2 Cache



Required properties:

- compatible : Should be "marvell,tauros2-cache".

- marvell,tauros2-cache-features : Specify the features supported for the

  tauros2 cache.

  The features including

    CACHE_TAUROS2_PREFETCH_ON       (1 << 0)

    CACHE_TAUROS2_LINEFILL_BURST8   (1 << 1)

  The definition can be found at

  arch/arm/include/asm/hardware/cache-tauros2.h



Example:

	L2: l2-cache {

		compatible = "marvell,tauros2-cache";

		marvell,tauros2-cache-features = <0x3>;

	};

Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt

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PXA3xx NAND DT bindings



Required properties:



 - compatible:		Should be "marvell,pxa3xx-nand"

 - reg: 		The register base for the controller

 - interrupts:		The interrupt to map

 - #address-cells:	Set to <1> if the node includes partitions



Optional properties:



 - marvell,nand-enable-arbiter:	Set to enable the bus arbiter

 - marvell,nand-keep-config:	Set to keep the NAND controller config as set

				by the bootloader

 - num-cs:			Number of chipselect lines to usw



Example:



	nand0: nand@43100000 {

		compatible = "marvell,pxa3xx-nand";

		reg = <0x43100000 90>;

		interrupts = <45>;

		#address-cells = <1>;



		marvell,nand-enable-arbiter;

		marvell,nand-keep-config;

		num-cs = <1>;



		/* partitions (optional) */

	};

Documentation/devicetree/bindings/rtc/pxa-rtc.txt

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* PXA RTC



PXA specific RTC driver.



Required properties:

- compatible : Should be "marvell,pxa-rtc"



Examples:



rtc@40900000 {

	compatible = "marvell,pxa-rtc";

	reg = <0x40900000 0x3c>;

	interrupts = <30 31>;

};

arch/arm/boot/dts/mmp2.dtsi

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@@ -26,6 +26,11 @@ 
		interrupt-parent = <&intc>;

		ranges;



		L2: l2-cache {

			compatible = "marvell,tauros2-cache";

			marvell,tauros2-cache-features = <0x3>;

		};



		axi@d4200000 {	/* AXI */

			compatible = "mrvl,axi-bus", "simple-bus";

			#address-cells = <1>;

arch/arm/boot/dts/pxa27x.dtsi

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/* The pxa3xx skeleton simply augments the 2xx version */

/include/ "pxa2xx.dtsi"



/ {

	model = "Marvell PXA27x familiy SoC";

	compatible = "marvell,pxa27x";



	pxabus {

		pxairq: interrupt-controller@40d00000 {

			marvell,intc-priority;

			marvell,intc-nr-irqs = <34>;

		};

	};

};

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