Commit 70bc7182 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/ltc: convert to new-style nvkm_subdev 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent b7a2bc18

drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h

+20 −15
Original line number Diff line number Diff line 
#ifndef __NVKM_LTC_H__

#define __NVKM_LTC_H__

#include <core/subdev.h>

struct nvkm_mm_node;

#include <core/mm.h>



#define NVKM_LTC_MAX_ZBC_CNT 16



struct nvkm_ltc {

	const struct nvkm_ltc_func *func;

	struct nvkm_subdev subdev;



	int  (*tags_alloc)(struct nvkm_ltc *, u32 count,

			   struct nvkm_mm_node **);

	void (*tags_free)(struct nvkm_ltc *, struct nvkm_mm_node **);

	void (*tags_clear)(struct nvkm_ltc *, u32 first, u32 count);

	u32 ltc_nr;

	u32 lts_nr;



	u32 num_tags;

	u32 tag_base;

	struct nvkm_mm tags;

	struct nvkm_mm_node *tag_ram;



	int zbc_min;

	int zbc_max;

	int (*zbc_color_get)(struct nvkm_ltc *, int index, const u32[4]);

	int (*zbc_depth_get)(struct nvkm_ltc *, int index, const u32);

	u32 zbc_color[NVKM_LTC_MAX_ZBC_CNT][4];

	u32 zbc_depth[NVKM_LTC_MAX_ZBC_CNT];

};



static inline struct nvkm_ltc *

nvkm_ltc(void *obj)

{

	return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_LTC);

}

int nvkm_ltc_tags_alloc(struct nvkm_ltc *, u32 count, struct nvkm_mm_node **);

void nvkm_ltc_tags_free(struct nvkm_ltc *, struct nvkm_mm_node **);

void nvkm_ltc_tags_clear(struct nvkm_ltc *, u32 first, u32 count);



int nvkm_ltc_zbc_color_get(struct nvkm_ltc *, int index, const u32[4]);

int nvkm_ltc_zbc_depth_get(struct nvkm_ltc *, int index, const u32);



extern struct nvkm_oclass *gf100_ltc_oclass;

extern struct nvkm_oclass *gk104_ltc_oclass;

extern struct nvkm_oclass *gm107_ltc_oclass;

int gf100_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **);

int gk104_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **);

int gm107_ltc_new(struct nvkm_device *, int, struct nvkm_ltc **);

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+21 −21
Original line number Diff line number Diff line
@@ -1300,7 +1300,7 @@ nvc0_chipset = { 
	.i2c = g94_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf100_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1335,7 +1335,7 @@ nvc1_chipset = { 
	.i2c = g94_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1369,7 +1369,7 @@ nvc3_chipset = { 
	.i2c = g94_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1403,7 +1403,7 @@ nvc4_chipset = { 
	.i2c = g94_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf100_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1438,7 +1438,7 @@ nvc8_chipset = { 
	.i2c = g94_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf100_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1473,7 +1473,7 @@ nvce_chipset = { 
	.i2c = g94_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf100_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1508,7 +1508,7 @@ nvcf_chipset = { 
	.i2c = g94_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1542,7 +1542,7 @@ nvd7_chipset = { 
	.i2c = gf117_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1574,7 +1574,7 @@ nvd9_chipset = { 
	.i2c = gf119_i2c_new,

	.ibus = gf100_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gf100_ltc_new,

	.ltc = gf100_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1608,7 +1608,7 @@ nve4_chipset = { 
	.i2c = gk104_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gk104_ltc_new,

	.ltc = gk104_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1644,7 +1644,7 @@ nve6_chipset = { 
	.i2c = gk104_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gk104_ltc_new,

	.ltc = gk104_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1680,7 +1680,7 @@ nve7_chipset = { 
	.i2c = gk104_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gk104_ltc_new,

	.ltc = gk104_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1712,7 +1712,7 @@ nvea_chipset = { 
	.fuse = gf100_fuse_new,

	.ibus = gk20a_ibus_new,

	.imem = gk20a_instmem_new,

//	.ltc = gk104_ltc_new,

	.ltc = gk104_ltc_new,

//	.mc = gk20a_mc_new,

//	.mmu = gf100_mmu_new,

//	.pmu = gk20a_pmu_new,
@@ -1740,7 +1740,7 @@ nvf0_chipset = { 
	.i2c = gk104_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gk104_ltc_new,

	.ltc = gk104_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1776,7 +1776,7 @@ nvf1_chipset = { 
	.i2c = gf119_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gk104_ltc_new,

	.ltc = gk104_ltc_new,

//	.mc = gf106_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1812,7 +1812,7 @@ nv106_chipset = { 
	.i2c = gk104_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gk104_ltc_new,

	.ltc = gk104_ltc_new,

//	.mc = gk20a_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1847,7 +1847,7 @@ nv108_chipset = { 
	.i2c = gk104_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gk104_ltc_new,

	.ltc = gk104_ltc_new,

//	.mc = gk20a_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1882,7 +1882,7 @@ nv117_chipset = { 
	.i2c = gf119_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gm107_ltc_new,

	.ltc = gm107_ltc_new,

//	.mc = gk20a_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1911,7 +1911,7 @@ nv124_chipset = { 
	.i2c = gm204_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gm107_ltc_new,

	.ltc = gm107_ltc_new,

//	.mc = gk20a_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1940,7 +1940,7 @@ nv126_chipset = { 
	.i2c = gm204_i2c_new,

	.ibus = gk104_ibus_new,

	.imem = nv50_instmem_new,

//	.ltc = gm107_ltc_new,

	.ltc = gm107_ltc_new,

//	.mc = gk20a_mc_new,

//	.mmu = gf100_mmu_new,

//	.mxm = nv50_mxm_new,
@@ -1965,7 +1965,7 @@ nv12b_chipset = { 
	.fuse = gm107_fuse_new,

	.ibus = gk20a_ibus_new,

	.imem = gk20a_instmem_new,

//	.ltc = gm107_ltc_new,

	.ltc = gm107_ltc_new,

//	.mc = gk20a_mc_new,

//	.mmu = gf100_mmu_new,

//	.mmu = gf100_mmu_new,

drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c

+0 −9
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf100_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -53,7 +52,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf100_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -74,7 +72,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -94,7 +91,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf100_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -115,7 +111,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -135,7 +130,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -155,7 +149,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf100_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -176,7 +169,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -196,7 +188,6 @@ gf100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c

+0 −8
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -54,7 +53,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -76,7 +74,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -96,7 +93,6 @@ gk104_identify(struct nvkm_device *device) 
	case 0xea:

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk20a_fifo_oclass;
@@ -112,7 +108,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -134,7 +129,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -156,7 +150,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -177,7 +170,6 @@ gk104_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c

+0 −4
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ gm100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
@@ -64,7 +63,6 @@ gm100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;

#if 0
@@ -93,7 +91,6 @@ gm100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;

#if 0
@@ -118,7 +115,6 @@ gm100_identify(struct nvkm_device *device) 
		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gm20b_fifo_oclass;

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