Commit 6c0ffb9d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

x86-64: clean up io-apic accesses 



This is just commit 130fe05d ported to
x86-64, for all the same reasons.  It cleans up the IO-APIC accesses in
order to then fix the ordering issues.

We move the accessor functions (that were only used by io_apic.c) out of
a header file, and use proper memory-mapped accesses rather than making
up our own "volatile" pointers.

Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 464908d7

arch/x86_64/kernel/io_apic.c

+46 −0
Original line number Diff line number Diff line
@@ -88,6 +88,52 @@ static struct irq_pin_list { 
	short apic, pin, next;

} irq_2_pin[PIN_MAP_SIZE];



struct io_apic {

	unsigned int index;

	unsigned int unused[3];

	unsigned int data;

};



static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)

{

	return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx)

		+ (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK);

}



static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)

{

	struct io_apic __iomem *io_apic = io_apic_base(apic);

	writel(reg, &io_apic->index);

	return readl(&io_apic->data);

}



static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)

{

	struct io_apic __iomem *io_apic = io_apic_base(apic);

	writel(reg, &io_apic->index);

	writel(value, &io_apic->data);

}



/*

 * Re-write a value: to be used for read-modify-write

 * cycles where the read already set up the index register.

 */

static inline void io_apic_modify(unsigned int apic, unsigned int value)

{

	struct io_apic __iomem *io_apic = io_apic_base(apic);

	writel(value, &io_apic->data);

}



/*

 * Synchronize the IO-APIC and the CPU by doing

 * a dummy read from the IO-APIC

 */

static inline void io_apic_sync(unsigned int apic)

{

	struct io_apic __iomem *io_apic = io_apic_base(apic);

	readl(&io_apic->data);

}



#define __DO_ACTION(R, ACTION, FINAL)					\

									\

{									\

include/asm-x86_64/io_apic.h

+0 −34
Original line number Diff line number Diff line
@@ -12,10 +12,6 @@ 


#define APIC_MISMATCH_DEBUG



#define IO_APIC_BASE(idx) \

		((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \

		+ (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))



/*

 * The structure of the IO-APIC:

 */
@@ -119,36 +115,6 @@ extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; 
/* non-0 if default (table-less) MP configuration */

extern int mpc_default_type;



static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)

{

	*IO_APIC_BASE(apic) = reg;

	return *(IO_APIC_BASE(apic)+4);

}



static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)

{

	*IO_APIC_BASE(apic) = reg;

	*(IO_APIC_BASE(apic)+4) = value;

}



/*

 * Re-write a value: to be used for read-modify-write

 * cycles where the read already set up the index register.

 */

static inline void io_apic_modify(unsigned int apic, unsigned int value)

{

	*(IO_APIC_BASE(apic)+4) = value;

}



/*

 * Synchronize the IO-APIC and the CPU by doing

 * a dummy read from the IO-APIC

 */

static inline void io_apic_sync(unsigned int apic)

{

	(void) *(IO_APIC_BASE(apic)+4);

}



/* 1 if "noapic" boot option passed */

extern int skip_ioapic_setup;

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