Commit 69d3e5a5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2020-03-20' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "Hope you are well hiding out above the garage. A few amdgpu changes
  but nothing too major. I've had a wisdom tooth out this week so
  haven't been to on top of things, but all seems good.

  core:
   - fix lease warning

  i915:
   - Track active elements during dequeue
   - Fix failure to handle all MCR ranges
   - Revert unnecessary workaround

  amdgpu:
   - Pageflip fix
   - VCN clockgating fixes
   - GPR debugfs fix for umr
   - GPU reset fix
   - eDP fix for MBP
   - DCN2.x fix

  dw-hdmi:
   - fix AVI frame colorimetry

  komeda:
   - fix compiler warning

  bochs:
   - downgrade a binding failure to a warning"

* tag 'drm-fixes-2020-03-20' of git://anongit.freedesktop.org/drm/drm:
  drm/amd/display: Fix pageflip event race condition for DCN.
  drm/amdgpu: fix typo for vcn2.5/jpeg2.5 idle check
  drm/amdgpu: fix typo for vcn2/jpeg2 idle check
  drm/amdgpu: fix typo for vcn1 idle check
  drm/lease: fix WARNING in idr_destroy
  drm/i915: Handle all MCR ranges
  Revert "drm/i915/tgl: Add extra hdc flush workaround"
  drm/i915/execlists: Track active elements during dequeue
  drm/bochs: downgrade pci_request_region failure from error to warning
  drm/amd/display: Add link_rate quirk for Apple 15" MBP 2017
  drm/amdgpu: add fbdev suspend/resume on gpu reset
  drm/amd/amdgpu: Fix GPR read from debugfs (v2)
  drm/amd/display: fix typos for dcn20_funcs and dcn21_funcs struct
  drm/komeda: mark PM functions as __maybe_unused
  drm/bridge: dw-hdmi: fix AVI frame colorimetry
parents 6c90b86a 5366b96b
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+3 −3
Original line number Diff line number Diff line
@@ -781,11 +781,11 @@ static ssize_t amdgpu_debugfs_gpr_read(struct file *f, char __user *buf,
	ssize_t result = 0;
	uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data;

	if (size & 3 || *pos & 3)
	if (size > 4096 || size & 3 || *pos & 3)
		return -EINVAL;

	/* decode offset */
	offset = *pos & GENMASK_ULL(11, 0);
	offset = (*pos & GENMASK_ULL(11, 0)) >> 2;
	se = (*pos & GENMASK_ULL(19, 12)) >> 12;
	sh = (*pos & GENMASK_ULL(27, 20)) >> 20;
	cu = (*pos & GENMASK_ULL(35, 28)) >> 28;
@@ -823,7 +823,7 @@ static ssize_t amdgpu_debugfs_gpr_read(struct file *f, char __user *buf,
	while (size) {
		uint32_t value;

		value = data[offset++];
		value = data[result >> 2];
		r = put_user(value, (uint32_t *)buf);
		if (r) {
			result = r;
+4 −0
Original line number Diff line number Diff line
@@ -3913,6 +3913,8 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
				if (r)
					goto out;

				amdgpu_fbdev_set_suspend(tmp_adev, 0);

				/* must succeed. */
				amdgpu_ras_resume(tmp_adev);

@@ -4086,6 +4088,8 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
		 */
		amdgpu_unregister_gpu_instance(tmp_adev);

		amdgpu_fbdev_set_suspend(adev, 1);

		/* disable ras on ALL IPs */
		if (!(in_ras_intr && !use_baco) &&
		      amdgpu_device_ip_need_full_reset(tmp_adev))
+1 −1
Original line number Diff line number Diff line
@@ -693,7 +693,7 @@ static int jpeg_v2_0_set_clockgating_state(void *handle,
	bool enable = (state == AMD_CG_STATE_GATE);

	if (enable) {
		if (jpeg_v2_0_is_idle(handle))
		if (!jpeg_v2_0_is_idle(handle))
			return -EBUSY;
		jpeg_v2_0_enable_clock_gating(adev);
	} else {
+1 −1
Original line number Diff line number Diff line
@@ -477,7 +477,7 @@ static int jpeg_v2_5_set_clockgating_state(void *handle,
			continue;

		if (enable) {
			if (jpeg_v2_5_is_idle(handle))
			if (!jpeg_v2_5_is_idle(handle))
				return -EBUSY;
			jpeg_v2_5_enable_clock_gating(adev, i);
		} else {
+1 −1
Original line number Diff line number Diff line
@@ -1352,7 +1352,7 @@ static int vcn_v1_0_set_clockgating_state(void *handle,

	if (enable) {
		/* wait for STATUS to clear */
		if (vcn_v1_0_is_idle(handle))
		if (!vcn_v1_0_is_idle(handle))
			return -EBUSY;
		vcn_v1_0_enable_clock_gating(adev);
	} else {
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