Commit 694dd304 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Rob Clark
Browse files

drm/msm/dsi: Add phy configuration for SDM630/636/660 



These SoCs make use of the 14nm phy, but at different
addresses than other 14nm units.

Signed-off-by: default avatarKonrad Dybcio <konradybcio@gmail.com>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 66ffb915

Documentation/devicetree/bindings/display/msm/dsi.txt

+1 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ Required properties: 
  * "qcom,dsi-phy-20nm"

  * "qcom,dsi-phy-28nm-8960"

  * "qcom,dsi-phy-14nm"

  * "qcom,dsi-phy-14nm-660"

  * "qcom,dsi-phy-10nm"

  * "qcom,dsi-phy-10nm-8998"

- reg: Physical base address and length of the registers of PLL, PHY. Some

drivers/gpu/drm/msm/dsi/phy/dsi_phy.c

+2 −0
Original line number Diff line number Diff line
@@ -499,6 +499,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { 
#ifdef CONFIG_DRM_MSM_DSI_14NM_PHY

	{ .compatible = "qcom,dsi-phy-14nm",

	  .data = &dsi_phy_14nm_cfgs },

	{ .compatible = "qcom,dsi-phy-14nm-660",

	  .data = &dsi_phy_14nm_660_cfgs },

#endif

#ifdef CONFIG_DRM_MSM_DSI_10NM_PHY

	{ .compatible = "qcom,dsi-phy-10nm",

drivers/gpu/drm/msm/dsi/phy/dsi_phy.h

+1 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_28nm_lp_cfgs; 
extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

+18 −0
Original line number Diff line number Diff line
@@ -161,3 +161,21 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs = { 
	.io_start = { 0x994400, 0x996400 },

	.num_dsi_phy = 2,

};



const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs = {

	.type = MSM_DSI_PHY_14NM,

	.src_pll_truthtable = { {false, false}, {true, false} },

	.reg_cfg = {

		.num = 1,

		.regs = {

			{"vcca", 17000, 32},

		},

	},

	.ops = {

		.enable = dsi_14nm_phy_enable,

		.disable = dsi_14nm_phy_disable,

		.init = dsi_14nm_phy_init,

	},

	.io_start = { 0xc994400, 0xc996000 },

	.num_dsi_phy = 2,

};

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