clk: ti: omap5: Fix reboot DPLL lock failure when using ABE TIMERs (66cc7af3) · Commits · 戴 / test

Having the ABE DPLL ref and bypass muxes set to different inputs was causing the DPLL not to lock when TIMER8 was used, as it is in the Pyra for the backlight. This patch fixes this by setting abe_dpll_bypass_clk_mux to sys_32k_ck in omap5xxx_dt_clk_init. A similar patch may also be needed for OMAP44xx which has similar code in omap4xxx_dt_clk_init, but I have not added this as I have no hardware to test on. Signed-off-by:

David Shah <dave@ds0.me> Signed-off-by:

H. Nikolaus Schaller <hns@goldelico.com> Link: https://lore.kernel.org/r/1d3abe2512054866cc2ea7b2592238f4fa06502a.1607253531.git.hns@goldelico.com Acked-by:

Tony Lindgren <tony@atomide.com> Signed-off-by:

Stephen Boyd <sboyd@kernel.org>

drivers/clk/ti/clk-54xx.c

+11 −1

Original line number	Diff line number	Diff line
		@@ -605,7 +605,7 @@ static struct ti_dt_clk omap54xx_clks[] = {
		int __init omap5xxx_dt_clk_init(void)
		{
		int rc;
		struct clk abe_dpll_ref, abe_dpll, sys_32k_ck, usb_dpll;
		struct clk abe_dpll_ref, abe_dpll, abe_dpll_byp, sys_32k_ck, *usb_dpll;

		ti_dt_clocks_register(omap54xx_clks);

		@@ -616,6 +616,16 @@ int __init omap5xxx_dt_clk_init(void)
		abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux");
		sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck");
		rc = clk_set_parent(abe_dpll_ref, sys_32k_ck);

		/*
		* This must also be set to sys_32k_ck to match or
		* the ABE DPLL will not lock on a warm reboot when
		* ABE timers are used.
		*/
		abe_dpll_byp = clk_get_sys(NULL, "abe_dpll_bypass_clk_mux");
		if (!rc)
		rc = clk_set_parent(abe_dpll_byp, sys_32k_ck);

		abe_dpll = clk_get_sys(NULL, "dpll_abe_ck");
		if (!rc)
		rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);

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