ARM: dt: sun4i: Add A10 SPI controller nodes (65918e26) · Commits · 戴 / test

arch/arm/boot/dts/sun4i-a10.dtsi

+44 −0

Original line number	Diff line number	Diff line
		@@ -339,6 +339,28 @@
		#size-cells = <1>;
		ranges;

		spi0: spi@01c05000 {
		compatible = "allwinner,sun4i-a10-spi";
		reg = <0x01c05000 0x1000>;
		interrupts = <10>;
		clocks = <&ahb_gates 20>, <&spi0_clk>;
		clock-names = "ahb", "mod";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		};

		spi1: spi@01c06000 {
		compatible = "allwinner,sun4i-a10-spi";
		reg = <0x01c06000 0x1000>;
		interrupts = <11>;
		clocks = <&ahb_gates 21>, <&spi1_clk>;
		clock-names = "ahb", "mod";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		};

		emac: ethernet@01c0b000 {
		compatible = "allwinner,sun4i-emac";
		reg = <0x01c0b000 0x1000>;
		@@ -355,6 +377,28 @@
		#size-cells = <0>;
		};

		spi2: spi@01c17000 {
		compatible = "allwinner,sun4i-a10-spi";
		reg = <0x01c17000 0x1000>;
		interrupts = <12>;
		clocks = <&ahb_gates 22>, <&spi2_clk>;
		clock-names = "ahb", "mod";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		};

		spi3: spi@01c1f000 {
		compatible = "allwinner,sun4i-a10-spi";
		reg = <0x01c1f000 0x1000>;
		interrupts = <50>;
		clocks = <&ahb_gates 23>, <&spi3_clk>;
		clock-names = "ahb", "mod";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		};

		intc: interrupt-controller@01c20400 {
		compatible = "allwinner,sun4i-ic";
		reg = <0x01c20400 0x400>;