ahci: qoriq: correct the sata ecc setting error (6022c5ca) · Commits · 戴 / test

Sata ecc is controlled by only 1 bit which is 24bit in big-endian in ecc register. So only setting 24bit to disable sata ecc prevents other bits from being overwritten in ecc register. Signed-off-by:

Tang Yuantian <andy.tang@nxp.com> Signed-off-by:

Tejun Heo <tj@kernel.org>

drivers/ata/ahci_qoriq.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -177,7 +177,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
		case AHCI_LS1043A:
		if (!qpriv->ecc_addr)
		return -EINVAL;
		writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
		writel(readl(qpriv->ecc_addr) \| ECC_DIS_ARMV8_CH2,
		qpriv->ecc_addr);
		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
		if (qpriv->is_dmacoherent)
		@@ -194,7 +195,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
		case AHCI_LS1046A:
		if (!qpriv->ecc_addr)
		return -EINVAL;
		writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
		writel(readl(qpriv->ecc_addr) \| ECC_DIS_ARMV8_CH2,
		qpriv->ecc_addr);
		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
		if (qpriv->is_dmacoherent)

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