Commit 5ede3ceb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

New feature development

This adds support for new features, and contains stuff from most
platforms. A number of these patches could have fit into other
branches, too, but were small enough not to cause too much
confusion here.

* tag 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits)
  mfd/db8500-prcmu: remove support for early silicon revisions
  ARM: ux500: fix the smp_twd clock calculation
  ARM: ux500: remove support for early silicon revisions
  ARM: ux500: update register files
  ARM: ux500: register DB5500 PMU dynamically
  ARM: ux500: update ASIC detection for U5500
  ARM: ux500: support DB8520
  ARM: picoxcell: implement watchdog restart
  ARM: OMAP3+: hwmod data: Add the default clockactivity for I2C
  ARM: OMAP3: hwmod data: disable multiblock reads on MMC1/2 on OMAP34xx/35xx <= ES2.1
  ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP4
  ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP3
  ARM: OMAP: hwmod data: Add support for AM35xx UART4/ttyO3
  ARM: Orion: Remove address map info from all platform data structures
  ARM: Orion: Get address map from plat-orion instead of via platform_data
  ARM: Orion: mbus_dram_info consolidation
  ARM: Orion: Consolidate the address map setup
  ARM: Kirkwood: Add configuration for MPP12 as GPIO
  ARM: Kirkwood: Recognize A1 revision of 6282 chip
  ARM: ux500: update the MOP500 GPIO assignments
  ...
parents 6d889d03 3e2762c8

arch/arm/boot/dts/highbank.dts

+12 −0
Original line number Diff line number Diff line
@@ -194,5 +194,17 @@ 
			reg = <0xfff3d000 0x1000>;

			interrupts = <0 92 4>;

		};



		ethernet@fff50000 {

			compatible = "calxeda,hb-xgmac";

			reg = <0xfff50000 0x1000>;

			interrupts = <0 77 4  0 78 4  0 79 4>;

		};



		ethernet@fff51000 {

			compatible = "calxeda,hb-xgmac";

			reg = <0xfff51000 0x1000>;

			interrupts = <0 80 4  0 81 4  0 82 4>;

		};

	};

};

arch/arm/configs/omap1_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y 
CONFIG_MACH_NOKIA770=y

CONFIG_MACH_AMS_DELTA=y

CONFIG_MACH_OMAP_GENERIC=y

CONFIG_OMAP_ARM_182MHZ=y

# CONFIG_ARM_THUMB is not set

CONFIG_PCCARD=y

CONFIG_OMAP_CF=y

arch/arm/mach-davinci/clock.c

+3 −10
Original line number Diff line number Diff line
@@ -31,19 +31,12 @@ static LIST_HEAD(clocks); 
static DEFINE_MUTEX(clocks_mutex);

static DEFINE_SPINLOCK(clockfw_lock);



static unsigned psc_domain(struct clk *clk)

{

	return (clk->flags & PSC_DSP)

		? DAVINCI_GPSC_DSPDOMAIN

		: DAVINCI_GPSC_ARMDOMAIN;

}



static void __clk_enable(struct clk *clk)

{

	if (clk->parent)

		__clk_enable(clk->parent);

	if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))

		davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,

		davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,

				true, clk->flags);

}
@@ -53,7 +46,7 @@ static void __clk_disable(struct clk *clk) 
		return;

	if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) &&

	    (clk->flags & CLK_PSC))

		davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc,

		davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,

				false, clk->flags);

	if (clk->parent)

		__clk_disable(clk->parent);
@@ -237,7 +230,7 @@ static int __init clk_disable_unused(void) 


		pr_debug("Clocks: disable unused %s\n", ck->name);



		davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc,

		davinci_psc_config(ck->domain, ck->gpsc, ck->lpsc,

				false, ck->flags);

	}

	spin_unlock_irq(&clockfw_lock);

arch/arm/mach-davinci/clock.h

+5 −5
Original line number Diff line number Diff line
@@ -93,6 +93,7 @@ struct clk { 
	u8			usecount;

	u8			lpsc;

	u8			gpsc;

	u8			domain;

	u32			flags;

	struct clk              *parent;

	struct list_head	children; 	/* list of children */
@@ -107,11 +108,10 @@ struct clk { 
/* Clock flags: SoC-specific flags start at BIT(16) */

#define ALWAYS_ENABLED		BIT(1)

#define CLK_PSC			BIT(2)

#define PSC_DSP			BIT(3) /* PSC uses DSP domain, not ARM */

#define CLK_PLL			BIT(4) /* PLL-derived clock */

#define PRE_PLL			BIT(5) /* source is before PLL mult/div */

#define PSC_SWRSTDISABLE	BIT(6) /* Disable state is SwRstDisable */

#define PSC_FORCE		BIT(7) /* Force module state transtition */

#define CLK_PLL			BIT(3) /* PLL-derived clock */

#define PRE_PLL			BIT(4) /* source is before PLL mult/div */

#define PSC_SWRSTDISABLE	BIT(5) /* Disable state is SwRstDisable */

#define PSC_FORCE		BIT(6) /* Force module state transtition */



#define CLK(dev, con, ck) 	\

	{			\

arch/arm/mach-davinci/dm644x.c

+2 −2
Original line number Diff line number Diff line
@@ -130,7 +130,7 @@ static struct clk dsp_clk = { 
	.name = "dsp",

	.parent = &pll1_sysclk1,

	.lpsc = DAVINCI_LPSC_GEM,

	.flags = PSC_DSP,

	.domain = DAVINCI_GPSC_DSPDOMAIN,

	.usecount = 1,			/* REVISIT how to disable? */

};
@@ -145,7 +145,7 @@ static struct clk vicp_clk = { 
	.name = "vicp",

	.parent = &pll1_sysclk2,

	.lpsc = DAVINCI_LPSC_IMCOP,

	.flags = PSC_DSP,

	.domain = DAVINCI_GPSC_DSPDOMAIN,

	.usecount = 1,			/* REVISIT how to disable? */

};

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