Commit 59c859d6 authored by Eugeni Dodonov's avatar Eugeni Dodonov Committed by Daniel Vetter
Browse files

drm/i915: account for only one PCH receiver on Haswell 



On Haswell, only one pipe can work in FDI mode, so this patch prevents
messing with wrong registers when FDI is being used by non-first pipe. And
to prevent this, we also specify that the VGA can only be used on pipe 0
for now in the crtc_mask value.

Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent bf507ef7

drivers/gpu/drm/i915/intel_crt.c

+5 −1
Original line number Original line Diff line number Diff line
@@ -615,7 +615,11 @@ void intel_crt_init(struct drm_device *dev) 
	crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |

	crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |

				1 << INTEL_ANALOG_CLONE_BIT |

				1 << INTEL_ANALOG_CLONE_BIT |

				1 << INTEL_SDVO_LVDS_CLONE_BIT);

				1 << INTEL_SDVO_LVDS_CLONE_BIT);

	if (IS_HASWELL(dev))

		crt->base.crtc_mask = (1 << 0);

	else

		crt->base.crtc_mask = (1 << 0) | (1 << 1);

		crt->base.crtc_mask = (1 << 0) | (1 << 1);



	if (IS_GEN2(dev))

	if (IS_GEN2(dev))

		connector->interlace_allowed = 0;

		connector->interlace_allowed = 0;

	else

	else

drivers/gpu/drm/i915/intel_display.c

+16 −3
Original line number Original line Diff line number Diff line
@@ -977,9 +977,14 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv, 
	u32 val;

	u32 val;

	bool cur_state;

	bool cur_state;





	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {

			DRM_ERROR("Attempting to enable FDI_RX on Haswell pipe > 0\n");

			return;

	} else {

		reg = FDI_RX_CTL(pipe);

		reg = FDI_RX_CTL(pipe);

		val = I915_READ(reg);

		val = I915_READ(reg);

		cur_state = !!(val & FDI_RX_ENABLE);

		cur_state = !!(val & FDI_RX_ENABLE);

	}

	WARN(cur_state != state,

	WARN(cur_state != state,

	     "FDI RX state assertion failure (expected %s, current %s)\n",

	     "FDI RX state assertion failure (expected %s, current %s)\n",

	     state_string(state), state_string(cur_state));

	     state_string(state), state_string(cur_state));
@@ -1012,6 +1017,10 @@ static void assert_fdi_rx_pll_enabled(struct drm_i915_private *dev_priv, 
	int reg;

	int reg;

	u32 val;

	u32 val;





	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {

		DRM_ERROR("Attempting to enable FDI on Haswell with pipe > 0\n");

		return;

	}

	reg = FDI_RX_CTL(pipe);

	reg = FDI_RX_CTL(pipe);

	val = I915_READ(reg);

	val = I915_READ(reg);

	WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");

	WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");
@@ -1483,6 +1492,10 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv, 
	assert_fdi_tx_enabled(dev_priv, pipe);

	assert_fdi_tx_enabled(dev_priv, pipe);

	assert_fdi_rx_enabled(dev_priv, pipe);

	assert_fdi_rx_enabled(dev_priv, pipe);





	if (IS_HASWELL(dev_priv->dev) && pipe > 0) {

		DRM_ERROR("Attempting to enable transcoder on Haswell with pipe > 0\n");

		return;

	}

	reg = TRANSCONF(pipe);

	reg = TRANSCONF(pipe);

	val = I915_READ(reg);

	val = I915_READ(reg);

	pipeconf_val = I915_READ(PIPECONF(pipe));

	pipeconf_val = I915_READ(PIPECONF(pipe));

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