Merge branch 'sti-drm-next-2016-06-30' of... (583fa4e0) · Commits · 戴 / test

drivers/gpu/drm/sti/Kconfig

+1 −0

Original line number	Diff line number	Diff line
		@@ -7,5 +7,6 @@ config DRM_STI
		select DRM_KMS_CMA_HELPER
		select DRM_PANEL
		select FW_LOADER
		select SND_SOC_HDMI_CODEC if SND_SOC
		help
		Choose this option to enable DRM on STM stiH41x chipset

drivers/gpu/drm/sti/sti_awg_utils.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -6,6 +6,8 @@

		#include "sti_awg_utils.h"

		#define AWG_DELAY (-5)

		#define AWG_OPCODE_OFFSET 10
		#define AWG_MAX_ARG 0x3ff

		@@ -125,7 +127,7 @@ static int awg_generate_line_signal(
		val = timing->blanking_level;
		ret \|= awg_generate_instr(RPLSET, val, 0, 0, fwparams);

		val = timing->trailing_pixels - 1;
		val = timing->trailing_pixels - 1 + AWG_DELAY;
		ret \|= awg_generate_instr(SKIP, val, 0, 0, fwparams);
		}

drivers/gpu/drm/sti/sti_crtc.c

+29 −30

Original line number	Diff line number	Diff line
		@@ -23,22 +23,11 @@
		static void sti_crtc_enable(struct drm_crtc *crtc)
		{
		struct sti_mixer *mixer = to_sti_mixer(crtc);
		struct device *dev = mixer->dev;
		struct sti_compositor *compo = dev_get_drvdata(dev);

		DRM_DEBUG_DRIVER("\n");

		mixer->status = STI_MIXER_READY;

		/* Prepare and enable the compo IP clock */
		if (mixer->id == STI_MIXER_MAIN) {
		if (clk_prepare_enable(compo->clk_compo_main))
		DRM_INFO("Failed to prepare/enable compo_main clk\n");
		} else {
		if (clk_prepare_enable(compo->clk_compo_aux))
		DRM_INFO("Failed to prepare/enable compo_aux clk\n");
		}

		drm_crtc_vblank_on(crtc);
		}

		@@ -57,9 +46,8 @@ sti_crtc_mode_set(struct drm_crtc crtc, struct drm_display_mode mode)
		struct sti_mixer *mixer = to_sti_mixer(crtc);
		struct device *dev = mixer->dev;
		struct sti_compositor *compo = dev_get_drvdata(dev);
		struct clk *clk;
		struct clk compo_clk, pix_clk;
		int rate = mode->clock * 1000;
		int res;

		DRM_DEBUG_KMS("CRTC:%d (%s) mode:%d (%s)\n",
		crtc->base.id, sti_mixer_to_str(mixer),
		@@ -74,32 +62,46 @@ sti_crtc_mode_set(struct drm_crtc crtc, struct drm_display_mode mode)
		mode->vsync_start, mode->vsync_end,
		mode->vtotal, mode->type, mode->flags);

		/* Set rate and prepare/enable pixel clock */
		if (mixer->id == STI_MIXER_MAIN)
		clk = compo->clk_pix_main;
		else
		clk = compo->clk_pix_aux;
		if (mixer->id == STI_MIXER_MAIN) {
		compo_clk = compo->clk_compo_main;
		pix_clk = compo->clk_pix_main;
		} else {
		compo_clk = compo->clk_compo_aux;
		pix_clk = compo->clk_pix_aux;
		}

		/* Prepare and enable the compo IP clock */
		if (clk_prepare_enable(compo_clk)) {
		DRM_INFO("Failed to prepare/enable compositor clk\n");
		goto compo_error;
		}

		res = clk_set_rate(clk, rate);
		if (res < 0) {
		/* Set rate and prepare/enable pixel clock */
		if (clk_set_rate(pix_clk, rate) < 0) {
		DRM_ERROR("Cannot set rate (%dHz) for pix clk\n", rate);
		return -EINVAL;
		goto pix_error;
		}
		if (clk_prepare_enable(clk)) {
		if (clk_prepare_enable(pix_clk)) {
		DRM_ERROR("Failed to prepare/enable pix clk\n");
		return -EINVAL;
		goto pix_error;
		}

		sti_vtg_set_config(mixer->id == STI_MIXER_MAIN ?
		compo->vtg_main : compo->vtg_aux, &crtc->mode);

		res = sti_mixer_active_video_area(mixer, &crtc->mode);
		if (res) {
		if (sti_mixer_active_video_area(mixer, &crtc->mode)) {
		DRM_ERROR("Can't set active video area\n");
		return -EINVAL;
		goto mixer_error;
		}

		return res;
		return 0;

		mixer_error:
		clk_disable_unprepare(pix_clk);
		pix_error:
		clk_disable_unprepare(compo_clk);
		compo_error:
		return -EINVAL;
		}

		static void sti_crtc_disable(struct drm_crtc *crtc)
		@@ -130,7 +132,6 @@ static void sti_crtc_disable(struct drm_crtc *crtc)
		static void
		sti_crtc_mode_set_nofb(struct drm_crtc *crtc)
		{
		sti_crtc_enable(crtc);
		sti_crtc_mode_set(crtc, &crtc->state->adjusted_mode);
		}

		@@ -221,9 +222,7 @@ static void sti_crtc_atomic_flush(struct drm_crtc *crtc,
		static const struct drm_crtc_helper_funcs sti_crtc_helper_funcs = {
		.enable = sti_crtc_enable,
		.disable = sti_crtc_disabling,
		.mode_set = drm_helper_crtc_mode_set,
		.mode_set_nofb = sti_crtc_mode_set_nofb,
		.mode_set_base = drm_helper_crtc_mode_set_base,
		.atomic_begin = sti_crtc_atomic_begin,
		.atomic_flush = sti_crtc_atomic_flush,
		};

drivers/gpu/drm/sti/sti_hdmi.c

+277 −17

Original line number	Diff line number	Diff line
		@@ -18,6 +18,8 @@
		#include <drm/drm_crtc_helper.h>
		#include <drm/drm_edid.h>

		#include <sound/hdmi-codec.h>

		#include "sti_hdmi.h"
		#include "sti_hdmi_tx3g4c28phy.h"
		#include "sti_hdmi_tx3g0c55phy.h"
		@@ -35,6 +37,8 @@
		#define HDMI_DFLT_CHL0_DAT 0x0110
		#define HDMI_DFLT_CHL1_DAT 0x0114
		#define HDMI_DFLT_CHL2_DAT 0x0118
		#define HDMI_AUDIO_CFG 0x0200
		#define HDMI_SPDIF_FIFO_STATUS 0x0204
		#define HDMI_SW_DI_1_HEAD_WORD 0x0210
		#define HDMI_SW_DI_1_PKT_WORD0 0x0214
		#define HDMI_SW_DI_1_PKT_WORD1 0x0218
		@@ -44,6 +48,9 @@
		#define HDMI_SW_DI_1_PKT_WORD5 0x0228
		#define HDMI_SW_DI_1_PKT_WORD6 0x022C
		#define HDMI_SW_DI_CFG 0x0230
		#define HDMI_SAMPLE_FLAT_MASK 0x0244
		#define HDMI_AUDN 0x0400
		#define HDMI_AUD_CTS 0x0404
		#define HDMI_SW_DI_2_HEAD_WORD 0x0600
		#define HDMI_SW_DI_2_PKT_WORD0 0x0604
		#define HDMI_SW_DI_2_PKT_WORD1 0x0608
		@@ -103,6 +110,7 @@
		#define HDMI_INT_DLL_LCK BIT(5)
		#define HDMI_INT_NEW_FRAME BIT(6)
		#define HDMI_INT_GENCTRL_PKT BIT(7)
		#define HDMI_INT_AUDIO_FIFO_XRUN BIT(8)
		#define HDMI_INT_SINK_TERM_PRESENT BIT(11)

		#define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
		@@ -111,6 +119,7 @@
		\| HDMI_INT_GLOBAL)

		#define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
		\| HDMI_INT_AUDIO_FIFO_XRUN \
		\| HDMI_INT_GENCTRL_PKT \
		\| HDMI_INT_NEW_FRAME \
		\| HDMI_INT_DLL_LCK \
		@@ -121,6 +130,27 @@

		#define HDMI_STA_SW_RST BIT(1)

		#define HDMI_AUD_CFG_8CH BIT(0)
		#define HDMI_AUD_CFG_SPDIF_DIV_2 BIT(1)
		#define HDMI_AUD_CFG_SPDIF_DIV_3 BIT(2)
		#define HDMI_AUD_CFG_SPDIF_CLK_DIV_4 (BIT(1) \| BIT(2))
		#define HDMI_AUD_CFG_CTS_CLK_256FS BIT(12)
		#define HDMI_AUD_CFG_DTS_INVALID BIT(16)
		#define HDMI_AUD_CFG_ONE_BIT_INVALID (BIT(18) \| BIT(19) \| BIT(20) \| BIT(21))
		#define HDMI_AUD_CFG_CH12_VALID BIT(28)
		#define HDMI_AUD_CFG_CH34_VALID BIT(29)
		#define HDMI_AUD_CFG_CH56_VALID BIT(30)
		#define HDMI_AUD_CFG_CH78_VALID BIT(31)

		/* sample flat mask */
		#define HDMI_SAMPLE_FLAT_NO 0
		#define HDMI_SAMPLE_FLAT_SP0 BIT(0)
		#define HDMI_SAMPLE_FLAT_SP1 BIT(1)
		#define HDMI_SAMPLE_FLAT_SP2 BIT(2)
		#define HDMI_SAMPLE_FLAT_SP3 BIT(3)
		#define HDMI_SAMPLE_FLAT_ALL (HDMI_SAMPLE_FLAT_SP0 \| HDMI_SAMPLE_FLAT_SP1 \|\
		HDMI_SAMPLE_FLAT_SP2 \| HDMI_SAMPLE_FLAT_SP3)

		#define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0)
		#define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8)
		#define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16)
		@@ -171,6 +201,10 @@ static irqreturn_t hdmi_irq_thread(int irq, void *arg)
		wake_up_interruptible(&hdmi->wait_event);
		}

		/* Audio FIFO underrun IRQ */
		if (hdmi->irq_status & HDMI_INT_AUDIO_FIFO_XRUN)
		DRM_INFO("Warning: audio FIFO underrun occurs!");

		return IRQ_HANDLED;
		}

		@@ -441,25 +475,28 @@ static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
		*/
		static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi)
		{
		struct hdmi_audio_infoframe infofame;
		struct hdmi_audio_params *audio = &hdmi->audio;
		u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)];
		int ret;

		ret = hdmi_audio_infoframe_init(&infofame);
		if (ret < 0) {
		DRM_ERROR("failed to setup audio infoframe: %d\n", ret);
		return ret;
		}

		infofame.channels = 2;

		ret = hdmi_audio_infoframe_pack(&infofame, buffer, sizeof(buffer));
		int ret, val;

		DRM_DEBUG_DRIVER("enter %s, AIF %s\n", __func__,
		audio->enabled ? "enable" : "disable");
		if (audio->enabled) {
		/* set audio parameters stored*/
		ret = hdmi_audio_infoframe_pack(&audio->cea, buffer,
		sizeof(buffer));
		if (ret < 0) {
		DRM_ERROR("failed to pack audio infoframe: %d\n", ret);
		return ret;
		}

		hdmi_infoframe_write_infopack(hdmi, buffer, ret);
		} else {
		/disable audio info frame transmission /
		val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
		val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK,
		HDMI_IFRAME_SLOT_AUDIO);
		hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
		}

		return 0;
		}
		@@ -650,6 +687,10 @@ static int hdmi_dbg_show(struct seq_file s, void data)
		DBGFS_DUMP("", HDMI_SW_DI_CFG);
		hdmi_dbg_sw_di_cfg(s, hdmi_read(hdmi, HDMI_SW_DI_CFG));

		DBGFS_DUMP("\n", HDMI_AUDIO_CFG);
		DBGFS_DUMP("\n", HDMI_SPDIF_FIFO_STATUS);
		DBGFS_DUMP("\n", HDMI_AUDN);

		seq_printf(s, "\n AVI Infoframe (Data Island slot N=%d):",
		HDMI_IFRAME_SLOT_AVI);
		DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_AVI);
		@@ -854,6 +895,7 @@ static int sti_hdmi_connector_get_modes(struct drm_connector *connector)

		count = drm_add_edid_modes(connector, edid);
		drm_mode_connector_update_edid_property(connector, edid);
		drm_edid_to_eld(connector, edid);

		kfree(edid);
		return count;
		@@ -1036,6 +1078,206 @@ static struct drm_encoder sti_hdmi_find_encoder(struct drm_device dev)
		return NULL;
		}

		/**
		* sti_hdmi_audio_get_non_coherent_n() - get N parameter for non-coherent
		* clocks. None-coherent clocks means that audio and TMDS clocks have not the
		* same source (drifts between clocks). In this case assumption is that CTS is
		* automatically calculated by hardware.
		*
		* @audio_fs: audio frame clock frequency in Hz
		*
		* Values computed are based on table described in HDMI specification 1.4b
		*
		* Returns n value.
		*/
		static int sti_hdmi_audio_get_non_coherent_n(unsigned int audio_fs)
		{
		unsigned int n;

		switch (audio_fs) {
		case 32000:
		n = 4096;
		break;
		case 44100:
		n = 6272;
		break;
		case 48000:
		n = 6144;
		break;
		case 88200:
		n = 6272 * 2;
		break;
		case 96000:
		n = 6144 * 2;
		break;
		case 176400:
		n = 6272 * 4;
		break;
		case 192000:
		n = 6144 * 4;
		break;
		default:
		/* Not pre-defined, recommended value: 128 * fs / 1000 */
		n = (audio_fs * 128) / 1000;
		}

		return n;
		}

		static int hdmi_audio_configure(struct sti_hdmi *hdmi,
		struct hdmi_audio_params *params)
		{
		int audio_cfg, n;
		struct hdmi_audio_infoframe *info = &params->cea;

		DRM_DEBUG_DRIVER("\n");

		if (!hdmi->enabled)
		return 0;

		/* update N parameter */
		n = sti_hdmi_audio_get_non_coherent_n(params->sample_rate);

		DRM_DEBUG_DRIVER("Audio rate = %d Hz, TMDS clock = %d Hz, n = %d\n",
		params->sample_rate, hdmi->mode.clock * 1000, n);
		hdmi_write(hdmi, n, HDMI_AUDN);

		/* update HDMI registers according to configuration */
		audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 \| HDMI_AUD_CFG_DTS_INVALID \|
		HDMI_AUD_CFG_ONE_BIT_INVALID;

		switch (info->channels) {
		case 8:
		audio_cfg \|= HDMI_AUD_CFG_CH78_VALID;
		case 6:
		audio_cfg \|= HDMI_AUD_CFG_CH56_VALID;
		case 4:
		audio_cfg \|= HDMI_AUD_CFG_CH34_VALID \| HDMI_AUD_CFG_8CH;
		case 2:
		audio_cfg \|= HDMI_AUD_CFG_CH12_VALID;
		break;
		default:
		DRM_ERROR("ERROR: Unsupported number of channels (%d)!\n",
		info->channels);
		return -EINVAL;
		}

		hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);

		hdmi->audio = *params;

		return hdmi_audio_infoframe_config(hdmi);
		}

		static void hdmi_audio_shutdown(struct device *dev)
		{
		struct sti_hdmi *hdmi = dev_get_drvdata(dev);
		int audio_cfg;

		DRM_DEBUG_DRIVER("\n");

		/* disable audio */
		audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 \| HDMI_AUD_CFG_DTS_INVALID \|
		HDMI_AUD_CFG_ONE_BIT_INVALID;
		hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);

		hdmi->audio.enabled = 0;
		hdmi_audio_infoframe_config(hdmi);
		}

		static int hdmi_audio_hw_params(struct device *dev,
		struct hdmi_codec_daifmt *daifmt,
		struct hdmi_codec_params *params)
		{
		struct sti_hdmi *hdmi = dev_get_drvdata(dev);
		int ret;
		struct hdmi_audio_params audio = {
		.sample_width = params->sample_width,
		.sample_rate = params->sample_rate,
		.cea = params->cea,
		};

		DRM_DEBUG_DRIVER("\n");

		if (!hdmi->enabled)
		return 0;

		if ((daifmt->fmt != HDMI_I2S) \|\| daifmt->bit_clk_inv \|\|
		daifmt->frame_clk_inv \|\| daifmt->bit_clk_master \|\|
		daifmt->frame_clk_master) {
		dev_err(dev, "%s: Bad flags %d %d %d %d\n", __func__,
		daifmt->bit_clk_inv, daifmt->frame_clk_inv,
		daifmt->bit_clk_master,
		daifmt->frame_clk_master);
		return -EINVAL;
		}

		audio.enabled = 1;

		ret = hdmi_audio_configure(hdmi, &audio);
		if (ret < 0)
		return ret;

		return 0;
		}

		static int hdmi_audio_digital_mute(struct device *dev, bool enable)
		{
		struct sti_hdmi *hdmi = dev_get_drvdata(dev);

		DRM_DEBUG_DRIVER("%s\n", enable ? "enable" : "disable");

		if (enable)
		hdmi_write(hdmi, HDMI_SAMPLE_FLAT_ALL, HDMI_SAMPLE_FLAT_MASK);
		else
		hdmi_write(hdmi, HDMI_SAMPLE_FLAT_NO, HDMI_SAMPLE_FLAT_MASK);

		return 0;
		}

		static int hdmi_audio_get_eld(struct device dev, uint8_t buf, size_t len)
		{
		struct sti_hdmi *hdmi = dev_get_drvdata(dev);
		struct drm_connector *connector = hdmi->drm_connector;

		DRM_DEBUG_DRIVER("\n");
		memcpy(buf, connector->eld, min(sizeof(connector->eld), len));

		return 0;
		}

		static const struct hdmi_codec_ops audio_codec_ops = {
		.hw_params = hdmi_audio_hw_params,
		.audio_shutdown = hdmi_audio_shutdown,
		.digital_mute = hdmi_audio_digital_mute,
		.get_eld = hdmi_audio_get_eld,
		};

		static int sti_hdmi_register_audio_driver(struct device *dev,
		struct sti_hdmi *hdmi)
		{
		struct hdmi_codec_pdata codec_data = {
		.ops = &audio_codec_ops,
		.max_i2s_channels = 8,
		.i2s = 1,
		};

		DRM_DEBUG_DRIVER("\n");

		hdmi->audio.enabled = 0;

		hdmi->audio_pdev = platform_device_register_data(
		dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
		&codec_data, sizeof(codec_data));

		if (IS_ERR(hdmi->audio_pdev))
		return PTR_ERR(hdmi->audio_pdev);

		DRM_INFO("%s Driver bound %s\n", HDMI_CODEC_DRV_NAME, dev_name(dev));

		return 0;
		}

		static int sti_hdmi_bind(struct device dev, struct device master, void *data)
		{
		struct sti_hdmi *hdmi = dev_get_drvdata(dev);
		@@ -1082,12 +1324,27 @@ static int sti_hdmi_bind(struct device dev, struct device master, void *data)
		/* initialise property */
		sti_hdmi_connector_init_property(drm_dev, drm_connector);

		hdmi->drm_connector = drm_connector;

		err = drm_mode_connector_attach_encoder(drm_connector, encoder);
		if (err) {
		DRM_ERROR("Failed to attach a connector to a encoder\n");
		goto err_sysfs;
		}

		err = sti_hdmi_register_audio_driver(dev, hdmi);
		if (err) {
		DRM_ERROR("Failed to attach an audio codec\n");
		goto err_sysfs;
		}

		/* Initialize audio infoframe */
		err = hdmi_audio_infoframe_init(&hdmi->audio.cea);
		if (err) {
		DRM_ERROR("Failed to init audio infoframe\n");
		goto err_sysfs;
		}

		/* Enable default interrupts */
		hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);

		@@ -1095,6 +1352,7 @@ static int sti_hdmi_bind(struct device dev, struct device master, void *data)

		err_sysfs:
		drm_bridge_remove(bridge);
		hdmi->drm_connector = NULL;
		return -EINVAL;
		}

		@@ -1244,6 +1502,8 @@ static int sti_hdmi_remove(struct platform_device *pdev)
		struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);

		i2c_put_adapter(hdmi->ddc_adapt);
		if (hdmi->audio_pdev)
		platform_device_unregister(hdmi->audio_pdev);
		component_del(&pdev->dev, &sti_hdmi_ops);

		return 0;

drivers/gpu/drm/sti/sti_hdmi.h

+13 −0

Original line number	Diff line number	Diff line
		@@ -23,6 +23,13 @@ struct hdmi_phy_ops {
		void (stop)(struct sti_hdmi hdmi);
		};

		struct hdmi_audio_params {
		bool enabled;
		unsigned int sample_width;
		unsigned int sample_rate;
		struct hdmi_audio_infoframe cea;
		};

		/* values for the framing mode property */
		enum sti_hdmi_modes {
		HDMI_MODE_HDMI,
		@@ -67,6 +74,9 @@ static const struct drm_prop_enum_list colorspace_mode_names[] = {
		* @ddc_adapt: i2c ddc adapter
		* @colorspace: current colorspace selected
		* @hdmi_mode: select framing for HDMI or DVI
		* @audio_pdev: ASoC hdmi-codec platform device
		* @audio: hdmi audio parameters.
		* @drm_connector: hdmi connector
		*/
		struct sti_hdmi {
		struct device dev;
		@@ -89,6 +99,9 @@ struct sti_hdmi {
		struct i2c_adapter *ddc_adapt;
		enum hdmi_colorspace colorspace;
		enum sti_hdmi_modes hdmi_mode;
		struct platform_device *audio_pdev;
		struct hdmi_audio_params audio;
		struct drm_connector *drm_connector;
		};

		u32 hdmi_read(struct sti_hdmi *hdmi, int offset);

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