Commit 4a84810e authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mscc-ocelot-add-support-for-SerDes-muxing-configuration'



Quentin Schulz says:

====================
mscc: ocelot: add support for SerDes muxing configuration

The Ocelot switch has currently an hardcoded SerDes muxing that suits only
a particular use case. Any other board setup will fail to work.

To prepare for upcoming boards' support that do not have the same muxing,
create a PHY driver that will handle all possible cases.

A SerDes can work in SGMII, QSGMII or PCIe and is also muxed to use a
given port depending on the selected mode or board design.

The SerDes configuration is in the middle of an address space (HSIO) that
is used to configure some parts in the MAC controller driver, that is why
we need to use a syscon so that we can write to the same address space from
different drivers safely using regmap.

This breaks backward compatibility but it's fine because there's only one
board at the moment that is using what's modified in this patch series.
This will break git bisect.

Even though this patch series is about SerDes __muxing__ configuration, the
DT node is named serdes for the simple reason that I couldn't find any
mention to SerDes anywhere else from the address space handled by this
driver.

v4:
  - add reviewed-by,
  - format the patch series with -M for identifying renamed files,
  - add parent info in DT binding of the SerDes IP,
  - move to macros SERDES[16]G(X) instead of multiple SERDES[16]G_[012345]
  constants,
  - move to SERDES[16]G_MAX being the last VALID macro of a type, so
  migrate to <= conditions instead of < when iterating,
  - create a SERDES_MUX_SGMII and SERDES_MUX_QSGMII macro so the muxing
  configurations are a tad more readable,
  - use a bunch of unsigned int instead of int,
  - return -EOPNOTSUPP for SERDES6G/PCIe until it's supported,
  - simplify condition when there is an error code returned by
  devm_of_phy_get,

v3:
  - add Paul Burton's Acked-By on MIPS patches so that the patch series can
  be merged in the net tree in its entirety,

v2:
  - use a switch case for setting the phy_mode in the SerDes driver as
  suggested by Andrew,
  - stop replacing the value of the error pointer in the SerDes driver,
  - use a dev_dbg for the deferring of the probe in the SerDes driver,
  - use constants in the Device Tree to select the SerDes macro in use with
  a port,
  - adapt the SerDes driver to use those constants,
  - add a header file in include/dt-bindings for the constants,
  - fix space/tab issue,
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 068b88cc 71e32a20
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+16 −0
Original line number Diff line number Diff line
@@ -41,3 +41,19 @@ Example:
		compatible = "mscc,ocelot-cpu-syscon", "syscon";
		reg = <0x70000000 0x2c>;
	};

o HSIO regs:

The SoC has a few registers (HSIO) handling miscellaneous functionalities:
configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
status, SerDes muxing and a thermal sensor.

Required properties:
- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
- reg : Should contain registers location and length

Example:
	syscon@10d0000 {
		compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
		reg = <0x10d0000 0x10000>;
	};
+3 −6
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ Required properties:
  - "sys"
  - "rew"
  - "qs"
  - "hsio"
  - "qsys"
  - "ana"
  - "portX" with X from 0 to the number of last port index available on that
@@ -45,7 +44,6 @@ Example:
		reg = <0x1010000 0x10000>,
		      <0x1030000 0x10000>,
		      <0x1080000 0x100>,
		      <0x10d0000 0x10000>,
		      <0x11e0000 0x100>,
		      <0x11f0000 0x100>,
		      <0x1200000 0x100>,
@@ -59,10 +57,9 @@ Example:
		      <0x1280000 0x100>,
		      <0x1800000 0x80000>,
		      <0x1880000 0x10000>;
		reg-names = "sys", "rew", "qs", "hsio", "port0",
			    "port1", "port2", "port3", "port4", "port5",
			    "port6", "port7", "port8", "port9", "port10",
			    "qsys", "ana";
		reg-names = "sys", "rew", "qs", "port0", "port1", "port2",
			    "port3", "port4", "port5", "port6", "port7",
			    "port8", "port9", "port10", "qsys", "ana";
		interrupts = <21 22>;
		interrupt-names = "xtr", "inj";

+43 −0
Original line number Diff line number Diff line
Microsemi Ocelot SerDes muxing driver
-------------------------------------

On Microsemi Ocelot, there is a handful of registers in HSIO address
space for setting up the SerDes to switch port muxing.

A SerDes X can be "muxed" to work with switch port Y or Z for example.
One specific SerDes can also be used as a PCIe interface.

Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.

There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.

Also, SERDES6G number (aka "macro") 0 is the only interface supporting
QSGMII.

This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.

Required properties:

- compatible: should be "mscc,vsc7514-serdes"
- #phy-cells : from the generic phy bindings, must be 2.
	       The first number defines the input port to use for a given
	       SerDes macro. The second defines the macro to use. They are
	       defined in dt-bindings/phy/phy-ocelot-serdes.h

Example:

	serdes: serdes {
		compatible = "mscc,vsc7514-serdes";
		#phy-cells = <2>;
	};

	ethernet {
		port1 {
			phy-handle = <&phy_foo>;
			/* Link SERDES1G_5 to port1 */
			phys = <&serdes 1 SERDES1G_5>;
		};
	};
+14 −5
Original line number Diff line number Diff line
@@ -107,7 +107,6 @@
			reg = <0x1010000 0x10000>,
			      <0x1030000 0x10000>,
			      <0x1080000 0x100>,
			      <0x10d0000 0x10000>,
			      <0x11e0000 0x100>,
			      <0x11f0000 0x100>,
			      <0x1200000 0x100>,
@@ -121,10 +120,10 @@
			      <0x1280000 0x100>,
			      <0x1800000 0x80000>,
			      <0x1880000 0x10000>;
			reg-names = "sys", "rew", "qs", "hsio", "port0",
				    "port1", "port2", "port3", "port4", "port5",
				    "port6", "port7", "port8", "port9", "port10",
				    "qsys", "ana";
			reg-names = "sys", "rew", "qs", "port0", "port1",
				    "port2", "port3", "port4", "port5", "port6",
				    "port7", "port8", "port9", "port10", "qsys",
				    "ana";
			interrupts = <21 22>;
			interrupt-names = "xtr", "inj";

@@ -231,5 +230,15 @@
			pinctrl-0 = <&miim1>;
			status = "disabled";
		};

		hsio: syscon@10d0000 {
			compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
			reg = <0x10d0000 0x10000>;

			serdes: serdes {
				compatible = "mscc,vsc7514-serdes";
				#phy-cells = <2>;
			};
		};
	};
};
+2 −0
Original line number Diff line number Diff line
@@ -23,6 +23,8 @@ config MSCC_OCELOT_SWITCH
config MSCC_OCELOT_SWITCH_OCELOT
	tristate "Ocelot switch driver on Ocelot"
	depends on MSCC_OCELOT_SWITCH
	depends on GENERIC_PHY
	depends on OF_NET
	help
	  This driver supports the Ocelot network switch device as present on
	  the Ocelot SoCs.
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