Commit 47be1cde authored by Cristian Ciocaltea's avatar Cristian Ciocaltea Committed by Manivannan Sadhasivam
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ARM: dts: owl-s500: Add RoseapplePi 



Add a Device Tree for the RoseapplePi SBC.

Signed-off-by: default avatarCristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: default avatarPeter Korsgaard <peter@korsgaard.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent 55f6c993

arch/arm/boot/dts/Makefile

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@@ -869,6 +869,7 @@ dtb-$(CONFIG_ARCH_ACTIONS) += \ 
	owl-s500-cubieboard6.dtb \

	owl-s500-guitar-bb-rev-b.dtb \

	owl-s500-labrador-base-m.dtb \

	owl-s500-roseapplepi.dtb \

	owl-s500-sparky.dtb

dtb-$(CONFIG_ARCH_PRIMA2) += \

	prima2-evb.dtb

arch/arm/boot/dts/owl-s500-roseapplepi.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Roseapple Pi

 *

 * Copyright (C) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>

 */



/dts-v1/;



#include "owl-s500.dtsi"



/ {

	compatible = "roseapplepi,roseapplepi", "actions,s500";

	model = "Roseapple Pi";



	aliases {

		serial2 = &uart2;

	};



	chosen {

		stdout-path = "serial2:115200n8";

	};



	memory@0 {

		device_type = "memory";

		reg = <0x0 0x80000000>; /* 2GB */

	};



	uart2_clk: uart2-clk {

		compatible = "fixed-clock";

		clock-frequency = <921600>;

		#clock-cells = <0>;

	};

};



&twd_timer {

	status = "okay";

};



&timer {

	clocks = <&hosc>;

};



&uart2 {

	status = "okay";

	clocks = <&uart2_clk>;

};

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