Commit 55f6c993 authored by Cristian Ciocaltea's avatar Cristian Ciocaltea Committed by Manivannan Sadhasivam
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ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiers



The PPI interrupts for cortex-a9 were incorrectly specified, fix them.

Fixes: fdfe7f4f ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
Signed-off-by: default avatarCristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: default avatarPeter Korsgaard <peter@korsgaard.com>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent 874a36f0
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+3 −3
Original line number Diff line number Diff line
@@ -84,21 +84,21 @@
		global_timer: timer@b0020200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0xb0020200 0x100>;
			interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			status = "disabled";
		};

		twd_timer: timer@b0020600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0xb0020600 0x20>;
			interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			status = "disabled";
		};

		twd_wdt: wdt@b0020620 {
			compatible = "arm,cortex-a9-twd-wdt";
			reg = <0xb0020620 0xe0>;
			interrupts = <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
			status = "disabled";
		};