Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Version 1 of the Activity Monitors architecture implements a counter group

of four fixed and architecturally defined 64-bit event counters.

- CPU cycle counter: increments at the frequency of the CPU.

- Constant counter: increments at the fixed frequency of the system

  clock.

Firmware (code running at higher exception levels, e.g. arm-tf) support is

needed to:

- Enable access for lower exception levels (EL2 and EL1) to the AMU

  registers.

- Enable the counters. If not enabled these will read as 0.

The fixed counters of AMUv1 are accessible though the following system

register definitions:

- SYS_AMEVCNTR0_CORE_EL0

- SYS_AMEVCNTR0_CONST_EL0

- SYS_AMEVCNTR0_INST_RET_EL0

----------------

Currently, access from userspace to the AMU registers is disabled due to:

- Security reasons: they might expose information about code executed in

  secure mode.

- Purpose: AMU counters are intended for system management use.

Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM

guest side is disabled due to:

- Security reasons: they might expose information about code executed

  by other guests or the host.

		get_random_bytes(&keys->apga, sizeof(keys->apga));

}

#define __ptrauth_key_install(k, v)				\

#define __ptrauth_key_install_nosync(k, v)			\

do {								\

	struct ptrauth_key __pki_v = (v);			\

	write_sysreg_s(__pki_v.lo, SYS_ ## k ## KEYLO_EL1);	\

static __always_inline void ptrauth_keys_switch_kernel(struct ptrauth_keys_kernel *keys)

{

	if (system_supports_address_auth())

		__ptrauth_key_install(APIA, keys->apia);

	if (!system_supports_address_auth())

		return;

	__ptrauth_key_install_nosync(APIA, keys->apia);

	isb();

}

extern int ptrauth_prctl_reset_keys(struct task_struct *tsk, unsigned long arg);