Commit 59bff30a authored by Randy Dunlap's avatar Randy Dunlap Committed by Catalin Marinas
Browse files

Documentation: arm64: fix amu.rst doc warnings 



Fix bullet list formatting to eliminate doc warnings:

Documentation/arm64/amu.rst:26: WARNING: Unexpected indentation.
Documentation/arm64/amu.rst:60: WARNING: Unexpected indentation.
Documentation/arm64/amu.rst:81: WARNING: Unexpected indentation.
Documentation/arm64/amu.rst:108: WARNING: Unexpected indentation.

Signed-off-by: default avatarRandy Dunlap <rdunlap@infradead.org>
Cc: Ionela Voinescu <ionela.voinescu@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 3fabb438

Documentation/arm64/amu.rst

+26 −21
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ optional external memory-mapped interface. 


Version 1 of the Activity Monitors architecture implements a counter group

of four fixed and architecturally defined 64-bit event counters.



- CPU cycle counter: increments at the frequency of the CPU.

- Constant counter: increments at the fixed frequency of the system

  clock.
@@ -57,6 +58,7 @@ counters, only the presence of the extension. 


Firmware (code running at higher exception levels, e.g. arm-tf) support is

needed to:



- Enable access for lower exception levels (EL2 and EL1) to the AMU

  registers.

- Enable the counters. If not enabled these will read as 0.
@@ -78,6 +80,7 @@ are not trapped in EL2/EL3. 


The fixed counters of AMUv1 are accessible though the following system

register definitions:



- SYS_AMEVCNTR0_CORE_EL0

- SYS_AMEVCNTR0_CONST_EL0

- SYS_AMEVCNTR0_INST_RET_EL0
@@ -93,6 +96,7 @@ Userspace access 
----------------



Currently, access from userspace to the AMU registers is disabled due to:



- Security reasons: they might expose information about code executed in

  secure mode.

- Purpose: AMU counters are intended for system management use.
@@ -105,6 +109,7 @@ Virtualization 


Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM

guest side is disabled due to:



- Security reasons: they might expose information about code executed

  by other guests or the host.

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