Unverified Commit 4396393f authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
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drm/sun4i: tcon: Set RGB DCLK min. divider based on hardware model 



In commit 0b8e7bbd ("drm/sun4i: tcon: Set min division of TCON0_DCLK
to 1.") it was assumed that all TCON variants support a minimum divider
of 1 if only DCLK was used.

However, the oldest generation of hardware only supports minimum divider
of 4 if only DCLK is used. If a divider of 1 was used on this old
hardware, some scrolling artifact would appear. A divider of 2 seemed
OK, but a divider of 3 had artifacts as well.

Set the minimum divider when outputing to parallel RGB based on the
hardware model, with a minimum of 4 for the oldest (A10/A10s/A13/A20)
hardware, and a minimum of 1 for the rest. A value is not set for the
TCON variants lacking channel 0.

This fixes the scrolling artifacts seen on my A13 tablet.

Fixes: 0b8e7bbd ("drm/sun4i: tcon: Set min division of TCON0_DCLK to 1.")
Cc: <stable@vger.kernel.org> # 5.4.x
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20200107070113.28951-1-wens@kernel.org
parent c4e4fccc

drivers/gpu/drm/sun4i/sun4i_tcon.c

+12 −3
Original line number Diff line number Diff line
@@ -489,7 +489,7 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, 


	WARN_ON(!tcon->quirks->has_channel_0);



	tcon->dclk_min_div = 1;

	tcon->dclk_min_div = tcon->quirks->dclk_min_div;

	tcon->dclk_max_div = 127;

	sun4i_tcon0_mode_set_common(tcon, mode);
@@ -1426,12 +1426,14 @@ static int sun8i_r40_tcon_tv_set_mux(struct sun4i_tcon *tcon, 
static const struct sun4i_tcon_quirks sun4i_a10_quirks = {

	.has_channel_0		= true,

	.has_channel_1		= true,

	.dclk_min_div		= 4,

	.set_mux		= sun4i_a10_tcon_set_mux,

};



static const struct sun4i_tcon_quirks sun5i_a13_quirks = {

	.has_channel_0		= true,

	.has_channel_1		= true,

	.dclk_min_div		= 4,

	.set_mux		= sun5i_a13_tcon_set_mux,

};
@@ -1440,6 +1442,7 @@ static const struct sun4i_tcon_quirks sun6i_a31_quirks = { 
	.has_channel_1		= true,

	.has_lvds_alt		= true,

	.needs_de_be_mux	= true,

	.dclk_min_div		= 1,

	.set_mux		= sun6i_tcon_set_mux,

};
@@ -1447,11 +1450,13 @@ static const struct sun4i_tcon_quirks sun6i_a31s_quirks = { 
	.has_channel_0		= true,

	.has_channel_1		= true,

	.needs_de_be_mux	= true,

	.dclk_min_div		= 1,

};



static const struct sun4i_tcon_quirks sun7i_a20_quirks = {

	.has_channel_0		= true,

	.has_channel_1		= true,

	.dclk_min_div		= 4,

	/* Same display pipeline structure as A10 */

	.set_mux		= sun4i_a10_tcon_set_mux,

};
@@ -1459,11 +1464,13 @@ static const struct sun4i_tcon_quirks sun7i_a20_quirks = { 
static const struct sun4i_tcon_quirks sun8i_a33_quirks = {

	.has_channel_0		= true,

	.has_lvds_alt		= true,

	.dclk_min_div		= 1,

};



static const struct sun4i_tcon_quirks sun8i_a83t_lcd_quirks = {

	.supports_lvds		= true,

	.has_channel_0		= true,

	.dclk_min_div		= 1,

};



static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = {
@@ -1477,11 +1484,13 @@ static const struct sun4i_tcon_quirks sun8i_r40_tv_quirks = { 


static const struct sun4i_tcon_quirks sun8i_v3s_quirks = {

	.has_channel_0		= true,

	.dclk_min_div		= 1,

};



static const struct sun4i_tcon_quirks sun9i_a80_tcon_lcd_quirks = {

	.has_channel_0		= true,

	.needs_edp_reset	= true,

	.dclk_min_div		= 1,

};



static const struct sun4i_tcon_quirks sun9i_a80_tcon_tv_quirks = {

drivers/gpu/drm/sun4i/sun4i_tcon.h

+1 −0
Original line number Diff line number Diff line
@@ -224,6 +224,7 @@ struct sun4i_tcon_quirks { 
	bool	needs_de_be_mux; /* sun6i needs mux to select backend */

	bool    needs_edp_reset; /* a80 edp reset needed for tcon0 access */

	bool	supports_lvds;   /* Does the TCON support an LVDS output? */

	u8	dclk_min_div;	/* minimum divider for TCON0 DCLK */



	/* callback to handle tcon muxing options */

	int	(*set_mux)(struct sun4i_tcon *, const struct drm_encoder *);

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