Unverified Commit 42b5ac83 authored by Jerome Brunet's avatar Jerome Brunet Committed by Mark Brown
Browse files

ASoC: meson: axg-fifo: relax period size constraints



Now that the fifo depths and thresholds are properly in the axg-fifo
driver, we can relax the constraints on period. As long as the period is a
multiple of the fifo burst size (8 bytes) things should be OK.

Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20191218172420.1199117-5-jbrunet@baylibre.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 23b89e1d
Loading
Loading
Loading
Loading
+4 −4
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ static struct snd_pcm_hardware axg_fifo_hw = {
	.rate_max = 192000,
	.channels_min = 1,
	.channels_max = AXG_FIFO_CH_MAX,
	.period_bytes_min = AXG_FIFO_MIN_DEPTH,
	.period_bytes_min = AXG_FIFO_BURST,
	.period_bytes_max = UINT_MAX,
	.periods_min = 2,
	.periods_max = UINT_MAX,
@@ -227,17 +227,17 @@ int axg_fifo_pcm_open(struct snd_soc_component *component,

	/*
	 * Make sure the buffer and period size are multiple of the FIFO
	 * minimum depth size
	 * burst
	 */
	ret = snd_pcm_hw_constraint_step(ss->runtime, 0,
					 SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
					 AXG_FIFO_MIN_DEPTH);
					 AXG_FIFO_BURST);
	if (ret)
		return ret;

	ret = snd_pcm_hw_constraint_step(ss->runtime, 0,
					 SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
					 AXG_FIFO_MIN_DEPTH);
					 AXG_FIFO_BURST);
	if (ret)
		return ret;

+0 −2
Original line number Diff line number Diff line
@@ -31,8 +31,6 @@ struct snd_soc_pcm_runtime;
					 SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE)

#define AXG_FIFO_BURST			8
#define AXG_FIFO_MIN_CNT		64
#define AXG_FIFO_MIN_DEPTH		(AXG_FIFO_BURST * AXG_FIFO_MIN_CNT)

#define FIFO_INT_ADDR_FINISH		BIT(0)
#define FIFO_INT_ADDR_INT		BIT(1)