Commit 3de5bdfb authored Dec 26, 2013 by Andrew Bresticker Committed by Peter De Schrijver Feb 17, 2014

clk: tegra: use max divider if divider overflows

When requesting a rate less than the minimum clock rate for a divider,
use the maximum divider value instead of bailing out with an error.
This matches the behavior of the generic clock divider.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>

parent 88b4bd70

drivers/clk/tegra/clk-divider.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -59,7 +59,7 @@ static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,
		return 0;

		if (divider_ux1 > get_max_div(divider))
		return -EINVAL;
		return get_max_div(divider);

		return divider_ux1;
		}

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