Commit 3a19f20c authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'samsung-soc-4.18' of... 

Merge tag 'samsung-soc-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc

Samsung mach/soc changes for v4.18

1. Remove at24_platform_data in S3C2440.
2. Fix invalid SPDX identifier.
3. Remove Exynos5440 entirely.
4. Cleanups.
5. Remove static mapping of SCU SFR and rely on DTS.

* tag 'samsung-soc-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux

:
  ARM: exynos: Remove unused soc_is_exynos{4,5}
  ARM: exynos: Remove static mapping of SCU SFR
  ARM: exynos: no need to select ARCH_HAS_BANDGAP any longer
  ARM: exynos: Remove support for Exynos5440
  ARM: s3c24xx: Fix invalid SPDX identifier
  ARM: samsung: simplify getting .drvdata
  ARM: s3c24xx: mini2440: Use device properties for at24 eeprom

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 08a5f1ac 9ad9a218

arch/arm/mach-exynos/Kconfig

+0 −13
Original line number Diff line number Diff line
@@ -8,7 +8,6 @@ 
menuconfig ARCH_EXYNOS

	bool "Samsung EXYNOS"

	depends on ARCH_MULTI_V7

	select ARCH_HAS_BANDGAP

	select ARCH_HAS_HOLES_MEMORYMODEL

	select ARCH_SUPPORTS_BIG_ENDIAN

	select ARM_AMBA
@@ -108,18 +107,6 @@ config SOC_EXYNOS5420 
	default y

	depends on ARCH_EXYNOS5



config SOC_EXYNOS5440

	bool "SAMSUNG EXYNOS5440"

	default y

	depends on ARCH_EXYNOS5

	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE

	select HAVE_ARM_ARCH_TIMER

	select AUTO_ZRELADDR

	select PINCTRL_EXYNOS5440

	select PM_OPP

	help

	  Enable EXYNOS5440 SoC support



config SOC_EXYNOS5800

	bool "SAMSUNG EXYNOS5800"

	default y

arch/arm/mach-exynos/common.h

+5 −12
Original line number Diff line number Diff line
@@ -21,7 +21,6 @@ 
#define EXYNOS5250_SOC_ID	0x43520000

#define EXYNOS5410_SOC_ID	0xE5410000

#define EXYNOS5420_SOC_ID	0xE5420000

#define EXYNOS5440_SOC_ID	0xE5440000

#define EXYNOS5800_SOC_ID	0xE5422000

#define EXYNOS5_SOC_MASK	0xFFFFF000
@@ -39,7 +38,6 @@ IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK) 
IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)

IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)

IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)

IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)

IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)



#if defined(CONFIG_SOC_EXYNOS3250)
@@ -82,22 +80,12 @@ IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK) 
# define soc_is_exynos5420()	0

#endif



#if defined(CONFIG_SOC_EXYNOS5440)

# define soc_is_exynos5440()	is_samsung_exynos5440()

#else

# define soc_is_exynos5440()	0

#endif



#if defined(CONFIG_SOC_EXYNOS5800)

# define soc_is_exynos5800()	is_samsung_exynos5800()

#else

# define soc_is_exynos5800()	0

#endif



#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4412())

#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \

			  soc_is_exynos5420() || soc_is_exynos5800())



extern u32 cp15_save_diag;

extern u32 cp15_save_power;
@@ -149,6 +137,11 @@ extern void exynos_cpu_restore_register(void); 
extern void exynos_pm_central_suspend(void);

extern int exynos_pm_central_resume(void);

extern void exynos_enter_aftr(void);

#ifdef CONFIG_SMP

extern void exynos_scu_enable(void);

#else

static inline void exynos_scu_enable(void) { }

#endif



extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;

arch/arm/mach-exynos/exynos.c

+2 −35
Original line number Diff line number Diff line
@@ -24,15 +24,6 @@ 


#include "common.h"



static struct map_desc exynos4_iodesc[] __initdata = {

	{

		.virtual	= (unsigned long)S5P_VA_COREPERI_BASE,

		.pfn		= __phys_to_pfn(EXYNOS4_PA_COREPERI),

		.length		= SZ_8K,

		.type		= MT_DEVICE,

	},

};



static struct platform_device exynos_cpuidle = {

	.name              = "exynos_cpuidle",

#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
@@ -63,15 +54,6 @@ void __init exynos_sysram_init(void) 
	}

}



static void __init exynos_init_late(void)

{

	if (of_machine_is_compatible("samsung,exynos5440"))

		/* to be supported later */

		return;



	exynos_pm_init();

}



static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,

					int depth, void *data)

{
@@ -79,8 +61,7 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, 
	const __be32 *reg;

	int len;



	if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&

		!of_flat_dt_is_compatible(node, "samsung,exynos5440-clock"))

	if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid"))

		return 0;



	reg = of_get_flat_dt_prop(node, "reg", &len);
@@ -95,17 +76,6 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, 
	return 1;

}



/*

 * exynos_map_io

 *

 * register the standard cpu IO areas

 */

static void __init exynos_map_io(void)

{

	if (soc_is_exynos4())

		iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));

}



static void __init exynos_init_io(void)

{

	debug_ll_io_init();
@@ -114,8 +84,6 @@ static void __init exynos_init_io(void) 


	/* detect cpu id and rev. */

	s5p_init_cpu(S5P_VA_CHIPID);



	exynos_map_io();

}



/*
@@ -209,7 +177,6 @@ static char const *const exynos_dt_compat[] __initconst = { 
	"samsung,exynos5250",

	"samsung,exynos5260",

	"samsung,exynos5420",

	"samsung,exynos5440",

	NULL

};
@@ -232,7 +199,7 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") 
	.init_early	= exynos_firmware_init,

	.init_irq	= exynos_init_irq,

	.init_machine	= exynos_dt_machine_init,

	.init_late	= exynos_init_late,

	.init_late	= exynos_pm_init,

	.dt_compat	= exynos_dt_compat,

	.dt_fixup	= exynos_dt_fixup,

MACHINE_END

arch/arm/mach-exynos/include/mach/map.h

+0 −2
Original line number Diff line number Diff line
@@ -15,6 +15,4 @@ 


#define EXYNOS_PA_CHIPID		0x10000000



#define EXYNOS4_PA_COREPERI		0x10500000



#endif /* __ASM_ARCH_MAP_H */

arch/arm/mach-exynos/platsmp.c

+21 −6
Original line number Diff line number Diff line
@@ -163,6 +163,26 @@ int exynos_cluster_power_state(int cluster) 
		S5P_CORE_LOCAL_PWR_EN);

}



/**

 * exynos_scu_enable : enables SCU for Cortex-A9 based system

 */

void exynos_scu_enable(void)

{

	struct device_node *np;

	static void __iomem *scu_base;



	if (!scu_base) {

		np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");

		if (np) {

			scu_base = of_iomap(np, 0);

			of_node_put(np);

		} else {

			scu_base = ioremap(scu_a9_get_base(), SZ_4K);

		}

	}

	scu_enable(scu_base);

}



static void __iomem *cpu_boot_reg_base(void)

{

	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
@@ -219,11 +239,6 @@ static void write_pen_release(int val) 
	sync_cache_w(&pen_release);

}



static void __iomem *scu_base_addr(void)

{

	return (void __iomem *)(S5P_VA_SCU);

}



static DEFINE_SPINLOCK(boot_lock);



static void exynos_secondary_init(unsigned int cpu)
@@ -389,7 +404,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) 
	exynos_set_delayed_reset_assertion(true);



	if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)

		scu_enable(scu_base_addr());

		exynos_scu_enable();



	/*

	 * Write the address of secondary startup into the

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