Commit 3a181237 authored by Balamuruhan S's avatar Balamuruhan S Committed by Michael Ellerman
Browse files

powerpc/ppc-opcode: Consolidate powerpc instructions from bpf_jit.h 



Move macro definitions of powerpc instructions from bpf_jit.h to
ppc-opcode.h and adopt the users of the macros accordingly. `PPC_MR()`
is defined twice in bpf_jit.h, remove the duplicate one.

Signed-off-by: default avatarBalamuruhan S <bala24@linux.ibm.com>
Tested-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: default avatarSandipan Das <sandipan@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200624113038.908074-5-bala24@linux.ibm.com
parent 06541865

arch/powerpc/include/asm/ppc-opcode.h

+85 −0
Original line number Diff line number Diff line
@@ -79,6 +79,16 @@ 
#define IMM_L(i)               ((uintptr_t)(i) & 0xffff)

#define IMM_DS(i)              ((uintptr_t)(i) & 0xfffc)



/*

 * 16-bit immediate helper macros: HA() is for use with sign-extending instrs

 * (e.g. LD, ADDI).  If the bottom 16 bits is "-ve", add another bit into the

 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).

 */

#define IMM_H(i)                ((uintptr_t)(i)>>16)

#define IMM_HA(i)               (((uintptr_t)(i)>>16) +                       \

					(((uintptr_t)(i) & 0x8000) >> 15))





/* opcode and xopcode for instructions */

#define OP_TRAP 3

#define OP_TRAP_64 2
@@ -540,6 +550,81 @@ 
#define PPC_RAW_ADD_DOT(t, a, b)	(PPC_INST_ADD | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | 0x1)

#define PPC_RAW_ADDC(t, a, b)		(PPC_INST_ADDC | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_ADDC_DOT(t, a, b)	(PPC_INST_ADDC | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | 0x1)

#define PPC_RAW_NOP()			(PPC_INST_NOP)

#define PPC_RAW_BLR()			(PPC_INST_BLR)

#define PPC_RAW_BLRL()			(PPC_INST_BLRL)

#define PPC_RAW_MTLR(r)			(PPC_INST_MTLR | ___PPC_RT(r))

#define PPC_RAW_BCTR()			(PPC_INST_BCTR)

#define PPC_RAW_MTCTR(r)		(PPC_INST_MTCTR | ___PPC_RT(r))

#define PPC_RAW_ADDI(d, a, i)		(PPC_INST_ADDI | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))

#define PPC_RAW_LI(r, i)		PPC_RAW_ADDI(r, 0, i)

#define PPC_RAW_ADDIS(d, a, i)		(PPC_INST_ADDIS | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))

#define PPC_RAW_LIS(r, i)		PPC_RAW_ADDIS(r, 0, i)

#define PPC_RAW_STDX(r, base, b)	(PPC_INST_STDX | ___PPC_RS(r) | ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_RAW_STDU(r, base, i)	(PPC_INST_STDU | ___PPC_RS(r) | ___PPC_RA(base) | ((i) & 0xfffc))

#define PPC_RAW_STW(r, base, i)		(PPC_INST_STW | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i))

#define PPC_RAW_STWU(r, base, i)	(PPC_INST_STWU | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i))

#define PPC_RAW_STH(r, base, i)		(PPC_INST_STH | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i))

#define PPC_RAW_STB(r, base, i)		(PPC_INST_STB | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i))

#define PPC_RAW_LBZ(r, base, i)		(PPC_INST_LBZ | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i))

#define PPC_RAW_LDX(r, base, b)		(PPC_INST_LDX | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_RAW_LHZ(r, base, i)		(PPC_INST_LHZ | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i))

#define PPC_RAW_LHBRX(r, base, b)	(PPC_INST_LHBRX | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_RAW_LDBRX(r, base, b)	(PPC_INST_LDBRX | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_RAW_STWCX(s, a, b)		(PPC_INST_STWCX | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_CMPWI(a, i)		(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i))

#define PPC_RAW_CMPDI(a, i)		(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i))

#define PPC_RAW_CMPW(a, b)		(PPC_INST_CMPW | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_CMPD(a, b)		(PPC_INST_CMPD | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_CMPLWI(a, i)		(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i))

#define PPC_RAW_CMPLDI(a, i)		(PPC_INST_CMPLDI | ___PPC_RA(a) | IMM_L(i))

#define PPC_RAW_CMPLW(a, b)		(PPC_INST_CMPLW | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_CMPLD(a, b)		(PPC_INST_CMPLD | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_SUB(d, a, b)		(PPC_INST_SUB | ___PPC_RT(d) | ___PPC_RB(a) | ___PPC_RA(b))

#define PPC_RAW_MULD(d, a, b)		(PPC_INST_MULLD | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_MULW(d, a, b)		(PPC_INST_MULLW | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_MULHWU(d, a, b)		(PPC_INST_MULHWU | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_MULI(d, a, i)		(PPC_INST_MULLI | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))

#define PPC_RAW_DIVWU(d, a, b)		(PPC_INST_DIVWU | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_DIVDU(d, a, b)		(PPC_INST_DIVDU | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_RAW_AND(d, a, b)		(PPC_INST_AND | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_RAW_ANDI(d, a, i)		(PPC_INST_ANDI | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_AND_DOT(d, a, b)	(PPC_INST_ANDDOT | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_RAW_OR(d, a, b)		(PPC_INST_OR | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_RAW_MR(d, a)		PPC_RAW_OR(d, a, a)

#define PPC_RAW_ORI(d, a, i)		(PPC_INST_ORI | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_ORIS(d, a, i)		(PPC_INST_ORIS | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_XOR(d, a, b)		(PPC_INST_XOR | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_RAW_XORI(d, a, i)		(PPC_INST_XORI | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_XORIS(d, a, i)		(PPC_INST_XORIS | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))

#define PPC_RAW_EXTSW(d, a)		(PPC_INST_EXTSW | ___PPC_RA(d) | ___PPC_RS(a))

#define PPC_RAW_SLW(d, a, s)		(PPC_INST_SLW | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_RAW_SLD(d, a, s)		(PPC_INST_SLD | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_RAW_SRW(d, a, s)		(PPC_INST_SRW | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_RAW_SRAW(d, a, s)		(PPC_INST_SRAW | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_RAW_SRAWI(d, a, i)		(PPC_INST_SRAWI | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i))

#define PPC_RAW_SRD(d, a, s)		(PPC_INST_SRD | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_RAW_SRAD(d, a, s)		(PPC_INST_SRAD | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_RAW_SRADI(d, a, i)		(PPC_INST_SRADI | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i))

#define PPC_RAW_RLWINM(d, a, i, mb, me)	\

	(PPC_INST_RLWINM | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))

#define PPC_RAW_RLWINM_DOT(d, a, i, mb, me) \

	(PPC_INST_RLWINM_DOT | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))

#define PPC_RAW_RLWIMI(d, a, i, mb, me) \

	(PPC_INST_RLWIMI | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))

#define PPC_RAW_RLDICL(d, a, i, mb)     (PPC_INST_RLDICL | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_MB64(mb))

#define PPC_RAW_RLDICR(d, a, i, me)     (PPC_INST_RLDICR | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_ME64(me))



/* slwi = rlwinm Rx, Ry, n, 0, 31-n */

#define PPC_RAW_SLWI(d, a, i)		PPC_RAW_RLWINM(d, a, i, 0, 31-(i))

/* srwi = rlwinm Rx, Ry, 32-n, n, 31 */

#define PPC_RAW_SRWI(d, a, i)		PPC_RAW_RLWINM(d, a, 32-(i), i, 31)

/* sldi = rldicr Rx, Ry, n, 63-n */

#define PPC_RAW_SLDI(d, a, i)		PPC_RAW_RLDICR(d, a, i, 63-(i))

/* sldi = rldicl Rx, Ry, 64-n, n */

#define PPC_RAW_SRDI(d, a, i)		PPC_RAW_RLDICL(d, a, 64-(i), i)



#define PPC_RAW_NEG(d, a)		(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a))



/* Deal with instructions that older assemblers aren't aware of */

#define	PPC_BCCTR_FLUSH		stringify_in_c(.long PPC_INST_BCCTR_FLUSH)

arch/powerpc/net/bpf_jit.h

+14 −152
Original line number Diff line number Diff line
@@ -19,150 +19,10 @@ 
#define FUNCTION_DESCR_SIZE	0

#endif



/*

 * 16-bit immediate helper macros: HA() is for use with sign-extending instrs

 * (e.g. LD, ADDI).  If the bottom 16 bits is "-ve", add another bit into the

 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).

 */

#define IMM_H(i)		((uintptr_t)(i)>>16)

#define IMM_HA(i)		(((uintptr_t)(i)>>16) +			      \

					(((uintptr_t)(i) & 0x8000) >> 15))



#define PLANT_INSTR(d, idx, instr)					      \

	do { if (d) { (d)[idx] = instr; } idx++; } while (0)

#define EMIT(instr)		PLANT_INSTR(image, ctx->idx, instr)



#define PPC_NOP()		EMIT(PPC_INST_NOP)

#define PPC_BLR()		EMIT(PPC_INST_BLR)

#define PPC_BLRL()		EMIT(PPC_INST_BLRL)

#define PPC_MTLR(r)		EMIT(PPC_INST_MTLR | ___PPC_RT(r))

#define PPC_BCTR()		EMIT(PPC_INST_BCTR)

#define PPC_MTCTR(r)		EMIT(PPC_INST_MTCTR | ___PPC_RT(r))

#define PPC_ADDI(d, a, i)	EMIT(PPC_INST_ADDI | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | IMM_L(i))

#define PPC_MR(d, a)		PPC_OR(d, a, a)

#define PPC_LI(r, i)		PPC_ADDI(r, 0, i)

#define PPC_ADDIS(d, a, i)	EMIT(PPC_INST_ADDIS |			      \

				     ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))

#define PPC_LIS(r, i)		PPC_ADDIS(r, 0, i)

#define PPC_STDX(r, base, b)	EMIT(PPC_INST_STDX | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_STDU(r, base, i)	EMIT(PPC_INST_STDU | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | ((i) & 0xfffc))

#define PPC_STW(r, base, i)	EMIT(PPC_INST_STW | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))

#define PPC_STWU(r, base, i)	EMIT(PPC_INST_STWU | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))

#define PPC_STH(r, base, i)	EMIT(PPC_INST_STH | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))

#define PPC_STB(r, base, i)	EMIT(PPC_INST_STB | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))



#define PPC_LBZ(r, base, i)	EMIT(PPC_INST_LBZ | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))

#define PPC_LDX(r, base, b)	EMIT(PPC_INST_LDX | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_LHZ(r, base, i)	EMIT(PPC_INST_LHZ | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))

#define PPC_LHBRX(r, base, b)	EMIT(PPC_INST_LHBRX | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_LDBRX(r, base, b)	EMIT(PPC_INST_LDBRX | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | ___PPC_RB(b))



#define PPC_BPF_STWCX(s, a, b)	EMIT(PPC_INST_STWCX | ___PPC_RS(s) |	      \

					___PPC_RA(a) | ___PPC_RB(b))

#define PPC_CMPWI(a, i)		EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i))

#define PPC_CMPDI(a, i)		EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i))

#define PPC_CMPW(a, b)		EMIT(PPC_INST_CMPW | ___PPC_RA(a) |	      \

					___PPC_RB(b))

#define PPC_CMPD(a, b)		EMIT(PPC_INST_CMPD | ___PPC_RA(a) |	      \

					___PPC_RB(b))

#define PPC_CMPLWI(a, i)	EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i))

#define PPC_CMPLDI(a, i)	EMIT(PPC_INST_CMPLDI | ___PPC_RA(a) | IMM_L(i))

#define PPC_CMPLW(a, b)		EMIT(PPC_INST_CMPLW | ___PPC_RA(a) |	      \

					___PPC_RB(b))

#define PPC_CMPLD(a, b)		EMIT(PPC_INST_CMPLD | ___PPC_RA(a) |	      \

					___PPC_RB(b))



#define PPC_SUB(d, a, b)	EMIT(PPC_INST_SUB | ___PPC_RT(d) |	      \

				     ___PPC_RB(a) | ___PPC_RA(b))

#define PPC_MULD(d, a, b)	EMIT(PPC_INST_MULLD | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_MULW(d, a, b)	EMIT(PPC_INST_MULLW | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_MULHWU(d, a, b)	EMIT(PPC_INST_MULHWU | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_MULI(d, a, i)	EMIT(PPC_INST_MULLI | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | IMM_L(i))

#define PPC_DIVWU(d, a, b)	EMIT(PPC_INST_DIVWU | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_DIVDU(d, a, b)	EMIT(PPC_INST_DIVDU | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_AND(d, a, b)	EMIT(PPC_INST_AND | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_ANDI(d, a, i)	EMIT(PPC_INST_ANDI | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | IMM_L(i))

#define PPC_AND_DOT(d, a, b)	EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_OR(d, a, b)		EMIT(PPC_INST_OR | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_MR(d, a)		PPC_OR(d, a, a)

#define PPC_ORI(d, a, i)	EMIT(PPC_INST_ORI | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | IMM_L(i))

#define PPC_ORIS(d, a, i)	EMIT(PPC_INST_ORIS | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | IMM_L(i))

#define PPC_XOR(d, a, b)	EMIT(PPC_INST_XOR | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(b))

#define PPC_XORI(d, a, i)	EMIT(PPC_INST_XORI | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | IMM_L(i))

#define PPC_XORIS(d, a, i)	EMIT(PPC_INST_XORIS | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | IMM_L(i))

#define PPC_EXTSW(d, a)		EMIT(PPC_INST_EXTSW | ___PPC_RA(d) |	      \

				     ___PPC_RS(a))

#define PPC_SLW(d, a, s)	EMIT(PPC_INST_SLW | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_SLD(d, a, s)	EMIT(PPC_INST_SLD | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_SRW(d, a, s)	EMIT(PPC_INST_SRW | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_SRAW(d, a, s)	EMIT(PPC_INST_SRAW | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_SRAWI(d, a, i)	EMIT(PPC_INST_SRAWI | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | __PPC_SH(i))

#define PPC_SRD(d, a, s)	EMIT(PPC_INST_SRD | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_SRAD(d, a, s)	EMIT(PPC_INST_SRAD | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | ___PPC_RB(s))

#define PPC_SRADI(d, a, i)	EMIT(PPC_INST_SRADI | ___PPC_RA(d) |	      \

				     ___PPC_RS(a) | __PPC_SH64(i))

#define PPC_RLWINM(d, a, i, mb, me)	EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \

					___PPC_RS(a) | __PPC_SH(i) |	      \

					__PPC_MB(mb) | __PPC_ME(me))

#define PPC_RLWINM_DOT(d, a, i, mb, me)	EMIT(PPC_INST_RLWINM_DOT |	      \

					___PPC_RA(d) | ___PPC_RS(a) |	      \

					__PPC_SH(i) | __PPC_MB(mb) |	      \

					__PPC_ME(me))

#define PPC_RLWIMI(d, a, i, mb, me)	EMIT(PPC_INST_RLWIMI | ___PPC_RA(d) | \

					___PPC_RS(a) | __PPC_SH(i) |	      \

					__PPC_MB(mb) | __PPC_ME(me))

#define PPC_RLDICL(d, a, i, mb)		EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \

					___PPC_RS(a) | __PPC_SH64(i) |	      \

					__PPC_MB64(mb))

#define PPC_RLDICR(d, a, i, me)		EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \

					___PPC_RS(a) | __PPC_SH64(i) |	      \

					__PPC_ME64(me))



/* slwi = rlwinm Rx, Ry, n, 0, 31-n */

#define PPC_SLWI(d, a, i)	PPC_RLWINM(d, a, i, 0, 31-(i))

/* srwi = rlwinm Rx, Ry, 32-n, n, 31 */

#define PPC_SRWI(d, a, i)	PPC_RLWINM(d, a, 32-(i), i, 31)

/* sldi = rldicr Rx, Ry, n, 63-n */

#define PPC_SLDI(d, a, i)	PPC_RLDICR(d, a, i, 63-(i))

/* sldi = rldicl Rx, Ry, 64-n, n */

#define PPC_SRDI(d, a, i)	PPC_RLDICL(d, a, 64-(i), i)



#define PPC_NEG(d, a)		EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a))



/* Long jump; (unconditional 'branch') */

#define PPC_JMP(dest)		EMIT(PPC_INST_BRANCH |			      \

				     (((dest) - (ctx->idx * 4)) & 0x03fffffc))
@@ -175,11 +35,11 @@ 
#define PPC_LI32(d, i)		do {					      \

		if ((int)(uintptr_t)(i) >= -32768 &&			      \

				(int)(uintptr_t)(i) < 32768)		      \

			PPC_LI(d, i);					      \

			EMIT(PPC_RAW_LI(d, i));				      \

		else {							      \

			PPC_LIS(d, IMM_H(i));				      \

			EMIT(PPC_RAW_LIS(d, IMM_H(i)));			      \

			if (IMM_L(i))					      \

				PPC_ORI(d, d, IMM_L(i));		      \

				EMIT(PPC_RAW_ORI(d, d, IMM_L(i)));	      \

		} } while(0)



#define PPC_LI64(d, i)		do {					      \
@@ -188,19 +48,21 @@ 
			PPC_LI32(d, i);					      \

		else {							      \

			if (!((uintptr_t)(i) & 0xffff800000000000ULL))	      \

				PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff);   \

				EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) &   \

						0xffff));		      \

			else {						      \

				PPC_LIS(d, ((uintptr_t)(i) >> 48));	      \

				EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \

				if ((uintptr_t)(i) & 0x0000ffff00000000ULL)   \

					PPC_ORI(d, d,			      \

					  ((uintptr_t)(i) >> 32) & 0xffff);   \

					EMIT(PPC_RAW_ORI(d, d,		      \

					  ((uintptr_t)(i) >> 32) & 0xffff));  \

			}						      \

			PPC_SLDI(d, d, 32);				      \

			EMIT(PPC_RAW_SLDI(d, d, 32));			      \

			if ((uintptr_t)(i) & 0x00000000ffff0000ULL)	      \

				PPC_ORIS(d, d,				      \

					 ((uintptr_t)(i) >> 16) & 0xffff);    \

				EMIT(PPC_RAW_ORIS(d, d,			      \

					 ((uintptr_t)(i) >> 16) & 0xffff));   \

			if ((uintptr_t)(i) & 0x000000000000ffffULL)	      \

				PPC_ORI(d, d, (uintptr_t)(i) & 0xffff);	      \

				EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) &       \

							0xffff));             \

		} } while (0)



#ifdef CONFIG_PPC64
@@ -224,7 +86,7 @@ static inline bool is_nearbranch(int offset) 
#define PPC_BCC(cond, dest)	do {					      \

		if (is_nearbranch((dest) - (ctx->idx * 4))) {		      \

			PPC_BCC_SHORT(cond, dest);			      \

			PPC_NOP();					      \

			EMIT(PPC_RAW_NOP());				      \

		} else {						      \

			/* Flip the 'T or F' bit to invert comparison */      \

			PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4);  \

arch/powerpc/net/bpf_jit32.h

+12 −12
Original line number Diff line number Diff line
@@ -72,21 +72,21 @@ DECLARE_LOAD_FUNC(sk_load_half); 
DECLARE_LOAD_FUNC(sk_load_byte);

DECLARE_LOAD_FUNC(sk_load_byte_msh);



#define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i);   \

		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \

			PPC_LBZ(r, r, IMM_L(i)); } } while(0)

#define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_RAW_LBZ(r, base, i));   \

		else {	EMIT(PPC_RAW_ADDIS(r, base, IMM_HA(i)));	      \

			EMIT(PPC_RAW_LBZ(r, r, IMM_L(i))); } } while(0)



#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_RAW_LD(r, base, i));     \

		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \

		else {	EMIT(PPC_RAW_ADDIS(r, base, IMM_HA(i)));			\

			EMIT(PPC_RAW_LD(r, r, IMM_L(i))); } } while(0)



#define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_RAW_LWZ(r, base, i));   \

		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \

		else {	EMIT(PPC_RAW_ADDIS(r, base, IMM_HA(i)));			\

			EMIT(PPC_RAW_LWZ(r, r, IMM_L(i))); } } while(0)



#define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i);   \

		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \

			PPC_LHZ(r, r, IMM_L(i)); } } while(0)

#define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_RAW_LHZ(r, base, i));   \

		else {	EMIT(PPC_RAW_ADDIS(r, base, IMM_HA(i)));			\

			EMIT(PPC_RAW_LHZ(r, r, IMM_L(i))); } } while(0)



#ifdef CONFIG_PPC64

#define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0)
@@ -107,11 +107,11 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); 
	} while(0)

#endif

#else

#define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0)

#define PPC_BPF_LOAD_CPU(r) do { EMIT(PPC_RAW_LI(r, 0)); } while(0)

#endif



#define PPC_LHBRX_OFFS(r, base, i) \

		do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0)

		do { PPC_LI32(r, i); EMIT(PPC_RAW_LHBRX(r, r, base)); } while(0)

#ifdef __LITTLE_ENDIAN__

#define PPC_NTOHS_OFFS(r, base, i)	PPC_LHBRX_OFFS(r, base, i)

#else
@@ -119,8 +119,8 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); 
#endif



#define PPC_BPF_LL(r, base, i) do { EMIT(PPC_RAW_LWZ(r, base, i)); } while(0)

#define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0)

#define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0)

#define PPC_BPF_STL(r, base, i) do { EMIT(PPC_RAW_STW(r, base, i)); } while(0)

#define PPC_BPF_STLU(r, base, i) do { EMIT(PPC_RAW_STWU(r, base, i)); } while(0)



#define SEEN_DATAREF 0x10000 /* might call external helpers */

#define SEEN_XREG    0x20000 /* X reg is used */

arch/powerpc/net/bpf_jit64.h

+7 −5
Original line number Diff line number Diff line
@@ -70,19 +70,21 @@ static const int b2p[] = { 
 */

#define PPC_BPF_LL(r, base, i) do {					      \

				if ((i) % 4) {				      \

					PPC_LI(b2p[TMP_REG_2], (i));	      \

					PPC_LDX(r, base, b2p[TMP_REG_2]);     \

					EMIT(PPC_RAW_LI(b2p[TMP_REG_2], (i)));\

					EMIT(PPC_RAW_LDX(r, base,	      \

							b2p[TMP_REG_2]));     \

				} else					      \

					EMIT(PPC_RAW_LD(r, base, i));	      \

				} while(0)

#define PPC_BPF_STL(r, base, i) do {					      \

				if ((i) % 4) {				      \

					PPC_LI(b2p[TMP_REG_2], (i));	      \

					PPC_STDX(r, base, b2p[TMP_REG_2]);    \

					EMIT(PPC_RAW_LI(b2p[TMP_REG_2], (i)));\

					EMIT(PPC_RAW_STDX(r, base,	      \

							b2p[TMP_REG_2]));     \

				} else					      \

					EMIT(PPC_RAW_STD(r, base, i));	      \

				} while(0)

#define PPC_BPF_STLU(r, base, i) do { PPC_STDU(r, base, i); } while(0)

#define PPC_BPF_STLU(r, base, i) do { EMIT(PPC_RAW_STDU(r, base, i)); } while(0)



#define SEEN_FUNC	0x1000 /* might call external helpers */

#define SEEN_STACK	0x2000 /* uses BPF stack */

arch/powerpc/net/bpf_jit_comp.c

+66 −66

File changed.

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