Commit 06541865 authored by Balamuruhan S's avatar Balamuruhan S Committed by Michael Ellerman
Browse files

powerpc/bpf_jit: Reuse instruction macros from ppc-opcode.h 



Remove duplicate macro definitions from bpf_jit.h and reuse the macros
from ppc-opcode.h

Signed-off-by: default avatarBalamuruhan S <bala24@linux.ibm.com>
Tested-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: default avatarNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: default avatarSandipan Das <sandipan@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200624113038.908074-4-bala24@linux.ibm.com
parent 1d33dd84

arch/powerpc/net/bpf_jit.h

+1 −17
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#ifndef __ASSEMBLY__



#include <asm/types.h>

#include <asm/ppc-opcode.h>



#ifdef PPC64_ELF_ABI_v1

#define FUNCTION_DESCR_SIZE	24
@@ -26,7 +27,6 @@ 
#define IMM_H(i)		((uintptr_t)(i)>>16)

#define IMM_HA(i)		(((uintptr_t)(i)>>16) +			      \

					(((uintptr_t)(i) & 0x8000) >> 15))

#define IMM_L(i)		((uintptr_t)(i) & 0xffff)



#define PLANT_INSTR(d, idx, instr)					      \

	do { if (d) { (d)[idx] = instr; } idx++; } while (0)
@@ -45,8 +45,6 @@ 
#define PPC_ADDIS(d, a, i)	EMIT(PPC_INST_ADDIS |			      \

				     ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))

#define PPC_LIS(r, i)		PPC_ADDIS(r, 0, i)

#define PPC_STD(r, base, i)	EMIT(PPC_INST_STD | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | ((i) & 0xfffc))

#define PPC_STDX(r, base, b)	EMIT(PPC_INST_STDX | ___PPC_RS(r) |	      \

				     ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_STDU(r, base, i)	EMIT(PPC_INST_STDU | ___PPC_RS(r) |	      \
@@ -62,12 +60,8 @@ 


#define PPC_LBZ(r, base, i)	EMIT(PPC_INST_LBZ | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))

#define PPC_LD(r, base, i)	EMIT(PPC_INST_LD | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | ((i) & 0xfffc))

#define PPC_LDX(r, base, b)	EMIT(PPC_INST_LDX | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | ___PPC_RB(b))

#define PPC_LWZ(r, base, i)	EMIT(PPC_INST_LWZ | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))

#define PPC_LHZ(r, base, i)	EMIT(PPC_INST_LHZ | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | IMM_L(i))

#define PPC_LHBRX(r, base, b)	EMIT(PPC_INST_LHBRX | ___PPC_RT(r) |	      \
@@ -75,16 +69,8 @@ 
#define PPC_LDBRX(r, base, b)	EMIT(PPC_INST_LDBRX | ___PPC_RT(r) |	      \

				     ___PPC_RA(base) | ___PPC_RB(b))



#define PPC_BPF_LDARX(t, a, b, eh) EMIT(PPC_INST_LDARX | ___PPC_RT(t) |	      \

					___PPC_RA(a) | ___PPC_RB(b) |	      \

					__PPC_EH(eh))

#define PPC_BPF_LWARX(t, a, b, eh) EMIT(PPC_INST_LWARX | ___PPC_RT(t) |	      \

					___PPC_RA(a) | ___PPC_RB(b) |	      \

					__PPC_EH(eh))

#define PPC_BPF_STWCX(s, a, b)	EMIT(PPC_INST_STWCX | ___PPC_RS(s) |	      \

					___PPC_RA(a) | ___PPC_RB(b))

#define PPC_BPF_STDCX(s, a, b)	EMIT(PPC_INST_STDCX | ___PPC_RS(s) |	      \

					___PPC_RA(a) | ___PPC_RB(b))

#define PPC_CMPWI(a, i)		EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i))

#define PPC_CMPDI(a, i)		EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i))

#define PPC_CMPW(a, b)		EMIT(PPC_INST_CMPW | ___PPC_RA(a) |	      \
@@ -100,8 +86,6 @@ 


#define PPC_SUB(d, a, b)	EMIT(PPC_INST_SUB | ___PPC_RT(d) |	      \

				     ___PPC_RB(a) | ___PPC_RA(b))

#define PPC_ADD(d, a, b)	EMIT(PPC_INST_ADD | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_MULD(d, a, b)	EMIT(PPC_INST_MULLD | ___PPC_RT(d) |	      \

				     ___PPC_RA(a) | ___PPC_RB(b))

#define PPC_MULW(d, a, b)	EMIT(PPC_INST_MULLW | ___PPC_RT(d) |	      \

arch/powerpc/net/bpf_jit32.h

+5 −5
Original line number Diff line number Diff line
@@ -76,13 +76,13 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); 
		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \

			PPC_LBZ(r, r, IMM_L(i)); } } while(0)



#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i);     \

#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_RAW_LD(r, base, i));     \

		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \

			PPC_LD(r, r, IMM_L(i)); } } while(0)

			EMIT(PPC_RAW_LD(r, r, IMM_L(i))); } } while(0)



#define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i);   \

#define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_RAW_LWZ(r, base, i));   \

		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \

			PPC_LWZ(r, r, IMM_L(i)); } } while(0)

			EMIT(PPC_RAW_LWZ(r, r, IMM_L(i))); } } while(0)



#define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i);   \

		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
@@ -118,7 +118,7 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh); 
#define PPC_NTOHS_OFFS(r, base, i)	PPC_LHZ_OFFS(r, base, i)

#endif



#define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0)

#define PPC_BPF_LL(r, base, i) do { EMIT(PPC_RAW_LWZ(r, base, i)); } while(0)

#define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0)

#define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0)

arch/powerpc/net/bpf_jit64.h

+2 −2
Original line number Diff line number Diff line
@@ -73,14 +73,14 @@ static const int b2p[] = { 
					PPC_LI(b2p[TMP_REG_2], (i));	      \

					PPC_LDX(r, base, b2p[TMP_REG_2]);     \

				} else					      \

					PPC_LD(r, base, i);		      \

					EMIT(PPC_RAW_LD(r, base, i));	      \

				} while(0)

#define PPC_BPF_STL(r, base, i) do {					      \

				if ((i) % 4) {				      \

					PPC_LI(b2p[TMP_REG_2], (i));	      \

					PPC_STDX(r, base, b2p[TMP_REG_2]);    \

				} else					      \

					PPC_STD(r, base, i);		      \

					EMIT(PPC_RAW_STD(r, base, i));	      \

				} while(0)

#define PPC_BPF_STLU(r, base, i) do { PPC_STDU(r, base, i); } while(0)

arch/powerpc/net/bpf_jit_comp.c

+1 −1
Original line number Diff line number Diff line
@@ -134,7 +134,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, 
			/*** ALU ops ***/

		case BPF_ALU | BPF_ADD | BPF_X: /* A += X; */

			ctx->seen |= SEEN_XREG;

			PPC_ADD(r_A, r_A, r_X);

			EMIT(PPC_RAW_ADD(r_A, r_A, r_X));

			break;

		case BPF_ALU | BPF_ADD | BPF_K: /* A += K; */

			if (!K)

arch/powerpc/net/bpf_jit_comp64.c

+10 −10
Original line number Diff line number Diff line
@@ -239,7 +239,7 @@ static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 
	 * if (index >= array->map.max_entries)

	 *   goto out;

	 */

	PPC_LWZ(b2p[TMP_REG_1], b2p_bpf_array, offsetof(struct bpf_array, map.max_entries));

	EMIT(PPC_RAW_LWZ(b2p[TMP_REG_1], b2p_bpf_array, offsetof(struct bpf_array, map.max_entries)));

	PPC_RLWINM(b2p_index, b2p_index, 0, 0, 31);

	PPC_CMPLW(b2p_index, b2p[TMP_REG_1]);

	PPC_BCC(COND_GE, out);
@@ -260,7 +260,7 @@ static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 


	/* prog = array->ptrs[index]; */

	PPC_MULI(b2p[TMP_REG_1], b2p_index, 8);

	PPC_ADD(b2p[TMP_REG_1], b2p[TMP_REG_1], b2p_bpf_array);

	EMIT(PPC_RAW_ADD(b2p[TMP_REG_1], b2p[TMP_REG_1], b2p_bpf_array));

	PPC_BPF_LL(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_array, ptrs));



	/*
@@ -340,7 +340,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, 
		 */

		case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */

		case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */

			PPC_ADD(dst_reg, dst_reg, src_reg);

			EMIT(PPC_RAW_ADD(dst_reg, dst_reg, src_reg));

			goto bpf_alu32_trunc;

		case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */

		case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */
@@ -357,7 +357,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, 
					PPC_ADDI(dst_reg, dst_reg, IMM_L(imm));

				else {

					PPC_LI32(b2p[TMP_REG_1], imm);

					PPC_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]);

					EMIT(PPC_RAW_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]));

				}

			}

			goto bpf_alu32_trunc;
@@ -689,9 +689,9 @@ emit_clear: 
			PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);

			tmp_idx = ctx->idx * 4;

			/* load value from memory into TMP_REG_2 */

			PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);

			EMIT(PPC_RAW_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0));

			/* add value from src_reg into this */

			PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);

			EMIT(PPC_RAW_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg));

			/* store result back */

			PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);

			/* we're done if this succeeded */
@@ -701,9 +701,9 @@ emit_clear: 
		case BPF_STX | BPF_XADD | BPF_DW:

			PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);

			tmp_idx = ctx->idx * 4;

			PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);

			PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);

			PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);

			EMIT(PPC_RAW_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0));

			EMIT(PPC_RAW_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg));

			EMIT(PPC_RAW_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]));

			PPC_BCC_SHORT(COND_NE, tmp_idx);

			break;
@@ -724,7 +724,7 @@ emit_clear: 
			break;

		/* dst = *(u32 *)(ul) (src + off) */

		case BPF_LDX | BPF_MEM | BPF_W:

			PPC_LWZ(dst_reg, src_reg, off);

			EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off));

			if (insn_is_zext(&insn[i + 1]))

				addrs[++i] = ctx->idx * 4;

			break;

CRA Git | Maintained and supported by SUSTech CRA and CCSE