Merge tag 'amd-drm-fixes-5.8-2020-07-09' of... (38794a54) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -37,7 +37,8 @@ static void amdgpu_job_timedout(struct drm_sched_job *s_job)

		memset(&ti, 0, sizeof(struct amdgpu_task_info));

		if (amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) {
		if (amdgpu_gpu_recovery &&
		amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) {
		DRM_ERROR("ring %s timeout, but soft recovered\n",
		s_job->sched->name);
		return;

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+59 −4

Original line number	Diff line number	Diff line
		@@ -372,6 +372,52 @@ static int psp_tmr_load(struct psp_context *psp)
		return ret;
		}

		static void psp_prep_tmr_unload_cmd_buf(struct psp_context *psp,
		struct psp_gfx_cmd_resp *cmd)
		{
		if (amdgpu_sriov_vf(psp->adev))
		cmd->cmd_id = GFX_CMD_ID_DESTROY_VMR;
		else
		cmd->cmd_id = GFX_CMD_ID_DESTROY_TMR;
		}

		static int psp_tmr_unload(struct psp_context *psp)
		{
		int ret;
		struct psp_gfx_cmd_resp *cmd;

		cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
		if (!cmd)
		return -ENOMEM;

		psp_prep_tmr_unload_cmd_buf(psp, cmd);
		DRM_INFO("free PSP TMR buffer\n");

		ret = psp_cmd_submit_buf(psp, NULL, cmd,
		psp->fence_buf_mc_addr);

		kfree(cmd);

		return ret;
		}

		static int psp_tmr_terminate(struct psp_context *psp)
		{
		int ret;
		void *tmr_buf;
		void **pptr;

		ret = psp_tmr_unload(psp);
		if (ret)
		return ret;

		/* free TMR memory buffer */
		pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
		amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr);

		return 0;
		}

		static void psp_prep_asd_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,
		uint64_t asd_mc, uint32_t size)
		{
		@@ -1779,8 +1825,6 @@ static int psp_hw_fini(void *handle)
		{
		struct amdgpu_device adev = (struct amdgpu_device )handle;
		struct psp_context *psp = &adev->psp;
		void *tmr_buf;
		void **pptr;

		if (psp->adev->psp.ta_fw) {
		psp_ras_terminate(psp);
		@@ -1790,10 +1834,9 @@ static int psp_hw_fini(void *handle)

		psp_asd_unload(psp);

		psp_tmr_terminate(psp);
		psp_ring_destroy(psp, PSP_RING_TYPE__KM);

		pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
		amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
		amdgpu_bo_free_kernel(&psp->fw_pri_bo,
		&psp->fw_pri_mc_addr, &psp->fw_pri_buf);
		amdgpu_bo_free_kernel(&psp->fence_buf_bo,
		@@ -1840,6 +1883,18 @@ static int psp_suspend(void *handle)
		}
		}

		ret = psp_asd_unload(psp);
		if (ret) {
		DRM_ERROR("Failed to unload asd\n");
		return ret;
		}

		ret = psp_tmr_terminate(psp);
		if (ret) {
		DRM_ERROR("Falied to terminate tmr\n");
		return ret;
		}

		ret = psp_ring_stop(psp, PSP_RING_TYPE__KM);
		if (ret) {
		DRM_ERROR("PSP ring stop failed\n");

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1358,7 +1358,7 @@ static int dm_late_init(void *handle)
		struct dmcu *dmcu = NULL;
		bool ret;

		if (!adev->dm.fw_dmcu)
		if (!adev->dm.fw_dmcu && !adev->dm.dmub_fw)
		return detect_mst_link_for_all_connectors(adev->ddev);

		dmcu = adev->dm.dc->res_pool->dmcu;

drivers/gpu/drm/radeon/ci_dpm.c

+3 −4

Original line number	Diff line number	Diff line
		@@ -5563,6 +5563,7 @@ static int ci_parse_power_table(struct radeon_device *rdev)
		if (!rdev->pm.dpm.ps)
		return -ENOMEM;
		power_state_offset = (u8 *)state_array->states;
		rdev->pm.dpm.num_ps = 0;
		for (i = 0; i < state_array->ucNumEntries; i++) {
		u8 *idx;
		power_state = (union pplib_power_state *)power_state_offset;
		@@ -5572,10 +5573,8 @@ static int ci_parse_power_table(struct radeon_device *rdev)
		if (!rdev->pm.power_state[i].clock_info)
		return -EINVAL;
		ps = kzalloc(sizeof(struct ci_ps), GFP_KERNEL);
		if (ps == NULL) {
		kfree(rdev->pm.dpm.ps);
		if (ps == NULL)
		return -ENOMEM;
		}
		rdev->pm.dpm.ps[i].ps_priv = ps;
		ci_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
		non_clock_info,
		@@ -5597,8 +5596,8 @@ static int ci_parse_power_table(struct radeon_device *rdev)
		k++;
		}
		power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
		rdev->pm.dpm.num_ps = i + 1;
		}
		rdev->pm.dpm.num_ps = state_array->ucNumEntries;

		/* fill in the vce power states */
		for (i = 0; i < RADEON_MAX_VCE_LEVELS; i++) {

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