Commit 1328af84 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2020-07-08' of... 

Merge tag 'drm-intel-fixes-2020-07-08' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

One display's fbc patch fixing fence_y_offset calculation
from Ville and 4 patches from Chris on GEM: 1 fixing a debugfs
panic and others fixing vma construction and pin under vm->mutex.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200708190654.GA3924867@intel.com
parents 76cfab9c 5a383d44

drivers/gpu/drm/i915/display/intel_display.c

+11 −0
Original line number Diff line number Diff line
@@ -3822,6 +3822,17 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, 
	return true;

}













unsigned int













intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)













{













	int x = 0, y = 0;

























	intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,













					  plane_state->color_plane[0].offset, 0);

























	return y;













}



























static int skl_check_main_surface(struct intel_plane_state *plane_state)















{















	struct drm_i915_private *dev_priv = to_i915(plane_state->uapi.plane->dev);

































drivers/gpu/drm/i915/display/intel_display.h



+1
−0






























Original line number
Diff line number
Diff line








@@ -608,6 +608,7 @@ unsigned int i9xx_plane_max_stride(struct intel_plane *plane,













				   u32 pixel_format, u64 modifier,















				   unsigned int rotation);















int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);













unsigned int intel_plane_fence_y_offset(const struct intel_plane_state *plane_state);































struct intel_display_error_state *















intel_display_capture_error_state(struct drm_i915_private *dev_priv);

































drivers/gpu/drm/i915/display/intel_fbc.c



+10
−22






























Original line number
Diff line number
Diff line








@@ -47,19 +47,6 @@













#include "intel_fbc.h"















#include "intel_frontbuffer.h"





























/*













 * In some platforms where the CRTC's x:0/y:0 coordinates doesn't match the













 * frontbuffer's x:0/y:0 coordinates we lie to the hardware about the plane's













 * origin so the x and y offsets can actually fit the registers. As a













 * consequence, the fence doesn't really start exactly at the display plane













 * address we program because it starts at the real start of the buffer, so we













 * have to take this into consideration here.













 */













static unsigned int get_crtc_fence_y_offset(struct intel_fbc *fbc)













{













	return fbc->state_cache.plane.y - fbc->state_cache.plane.adjusted_y;













}





























/*















 * For SKL+, the plane source size used by the hardware is based on the value we















 * write to the PLANE_SIZE register. For BDW-, the hardware looks at the value










@@ -141,7 +128,7 @@ static void i8xx_fbc_activate(struct drm_i915_private *dev_priv)













			fbc_ctl2 |= FBC_CTL_CPU_FENCE;















		intel_de_write(dev_priv, FBC_CONTROL2, fbc_ctl2);















		intel_de_write(dev_priv, FBC_FENCE_OFF,













			       params->crtc.fence_y_offset);













			       params->fence_y_offset);















	}































	/* enable it... */










@@ -175,7 +162,7 @@ static void g4x_fbc_activate(struct drm_i915_private *dev_priv)













	if (params->fence_id >= 0) {















		dpfc_ctl |= DPFC_CTL_FENCE_EN | params->fence_id;















		intel_de_write(dev_priv, DPFC_FENCE_YOFF,













			       params->crtc.fence_y_offset);













			       params->fence_y_offset);















	} else {















		intel_de_write(dev_priv, DPFC_FENCE_YOFF, 0);















	}










@@ -243,7 +230,7 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv)













			intel_de_write(dev_priv, SNB_DPFC_CTL_SA,















				       SNB_CPU_FENCE_ENABLE | params->fence_id);















			intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,













				       params->crtc.fence_y_offset);













				       params->fence_y_offset);















		}















	} else {















		if (IS_GEN(dev_priv, 6)) {









@@ -253,7 +240,7 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv)













	}































	intel_de_write(dev_priv, ILK_DPFC_FENCE_YOFF,













		       params->crtc.fence_y_offset);













		       params->fence_y_offset);















	/* enable it... */















	intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);


























@@ -320,7 +307,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)













		intel_de_write(dev_priv, SNB_DPFC_CTL_SA,















			       SNB_CPU_FENCE_ENABLE | params->fence_id);















		intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,













			       params->crtc.fence_y_offset);













			       params->fence_y_offset);















	} else if (dev_priv->ggtt.num_fences) {















		intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0);















		intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0);










@@ -631,8 +618,8 @@ static bool rotation_is_valid(struct drm_i915_private *dev_priv,













/*















 * For some reason, the hardware tracking starts looking at whatever we















 * programmed as the display plane base address register. It does not look at













 * the X and Y offset registers. That's why we look at the crtc->adjusted{x,y}













 * variables instead of just looking at the pipe/plane size.













 * the X and Y offset registers. That's why we include the src x/y offsets













 * instead of just looking at the plane size.















 */















static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc)















{










@@ -705,7 +692,6 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,













	cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;















	cache->plane.adjusted_x = plane_state->color_plane[0].x;















	cache->plane.adjusted_y = plane_state->color_plane[0].y;













	cache->plane.y = plane_state->uapi.src.y1 >> 16;































	cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;

























@@ -713,6 +699,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,













	cache->fb.stride = fb->pitches[0];















	cache->fb.modifier = fb->modifier;





























	cache->fence_y_offset = intel_plane_fence_y_offset(plane_state);





























	drm_WARN_ON(&dev_priv->drm, plane_state->flags & PLANE_HAS_FENCE &&















		    !plane_state->vma->fence);


























@@ -883,10 +871,10 @@ static void intel_fbc_get_reg_params(struct intel_crtc *crtc,













	memset(params, 0, sizeof(*params));































	params->fence_id = cache->fence_id;













	params->fence_y_offset = cache->fence_y_offset;































	params->crtc.pipe = crtc->pipe;















	params->crtc.i9xx_plane = to_intel_plane(crtc->base.primary)->i9xx_plane;













	params->crtc.fence_y_offset = get_crtc_fence_y_offset(fbc);































	params->fb.format = cache->fb.format;















	params->fb.stride = cache->fb.stride;

































drivers/gpu/drm/i915/gt/intel_context.c



+6
−6






























Original line number
Diff line number
Diff line








@@ -204,25 +204,25 @@ static int __ring_active(struct intel_ring *ring)













{















	int err;





























	err = i915_active_acquire(&ring->vma->active);













	err = intel_ring_pin(ring);















	if (err)















		return err;





























	err = intel_ring_pin(ring);













	err = i915_active_acquire(&ring->vma->active);















	if (err)













		goto err_active;













		goto err_pin;































	return 0;





























err_active:













	i915_active_release(&ring->vma->active);













err_pin:













	intel_ring_unpin(ring);















	return err;















}































static void __ring_retire(struct intel_ring *ring)















{













	intel_ring_unpin(ring);















	i915_active_release(&ring->vma->active);













	intel_ring_unpin(ring);















}































__i915_active_call

































drivers/gpu/drm/i915/i915_debugfs.c



+1
−1






























Original line number
Diff line number
Diff line








@@ -230,7 +230,7 @@ static int per_file_stats(int id, void *ptr, void *data)













	struct file_stats *stats = data;















	struct i915_vma *vma;





























	if (!kref_get_unless_zero(&obj->base.refcount))













	if (IS_ERR_OR_NULL(obj) || !kref_get_unless_zero(&obj->base.refcount))















		return 0;































	stats->count++;









































































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