Commit 37a4493e authored by Mike Turquette's avatar Mike Turquette
Browse files

Merge tag 'mvebu-clk-fixes-3.14' of git://git.infradead.org/linux-mvebu into clk-fixes 

mvebu clock fixes for v3.14

 - kirkwood, dove, armada-xp, armada-370
    - force clock init order broken by sorting DT ocp nodes by address
    - fixes boot failures on affected platforms
parents 8510e726 58d516ae

drivers/clk/mvebu/armada-370.c

+10 −11
Original line number Diff line number Diff line
@@ -141,13 +141,6 @@ static const struct coreclk_soc_desc a370_coreclks = { 
	.num_ratios = ARRAY_SIZE(a370_coreclk_ratios),

};



static void __init a370_coreclk_init(struct device_node *np)

{

	mvebu_coreclk_setup(np, &a370_coreclks);

}

CLK_OF_DECLARE(a370_core_clk, "marvell,armada-370-core-clock",

	       a370_coreclk_init);



/*

 * Clock Gating Control

 */
@@ -168,9 +161,15 @@ static const struct clk_gating_soc_desc a370_gating_desc[] __initconst = { 
	{ }

};



static void __init a370_clk_gating_init(struct device_node *np)

static void __init a370_clk_init(struct device_node *np)

{

	mvebu_clk_gating_setup(np, a370_gating_desc);

	struct device_node *cgnp =

		of_find_compatible_node(NULL, NULL, "marvell,armada-370-gating-clock");



	mvebu_coreclk_setup(np, &a370_coreclks);



	if (cgnp)

		mvebu_clk_gating_setup(cgnp, a370_gating_desc);

}

CLK_OF_DECLARE(a370_clk_gating, "marvell,armada-370-gating-clock",

	       a370_clk_gating_init);
 
CLK_OF_DECLARE(a370_clk, "marvell,armada-370-core-clock", a370_clk_init);

drivers/clk/mvebu/armada-xp.c

+9 −11
Original line number Diff line number Diff line
@@ -158,13 +158,6 @@ static const struct coreclk_soc_desc axp_coreclks = { 
	.num_ratios = ARRAY_SIZE(axp_coreclk_ratios),

};



static void __init axp_coreclk_init(struct device_node *np)

{

	mvebu_coreclk_setup(np, &axp_coreclks);

}

CLK_OF_DECLARE(axp_core_clk, "marvell,armada-xp-core-clock",

	       axp_coreclk_init);



/*

 * Clock Gating Control

 */
@@ -202,9 +195,14 @@ static const struct clk_gating_soc_desc axp_gating_desc[] __initconst = { 
	{ }

};



static void __init axp_clk_gating_init(struct device_node *np)

static void __init axp_clk_init(struct device_node *np)

{

	mvebu_clk_gating_setup(np, axp_gating_desc);

	struct device_node *cgnp =

		of_find_compatible_node(NULL, NULL, "marvell,armada-xp-gating-clock");



	mvebu_coreclk_setup(np, &axp_coreclks);



	if (cgnp)

		mvebu_clk_gating_setup(cgnp, axp_gating_desc);

}

CLK_OF_DECLARE(axp_clk_gating, "marvell,armada-xp-gating-clock",

	       axp_clk_gating_init);
 
CLK_OF_DECLARE(axp_clk, "marvell,armada-xp-core-clock", axp_clk_init);

drivers/clk/mvebu/dove.c

+9 −10
Original line number Diff line number Diff line
@@ -154,12 +154,6 @@ static const struct coreclk_soc_desc dove_coreclks = { 
	.num_ratios = ARRAY_SIZE(dove_coreclk_ratios),

};



static void __init dove_coreclk_init(struct device_node *np)

{

	mvebu_coreclk_setup(np, &dove_coreclks);

}

CLK_OF_DECLARE(dove_core_clk, "marvell,dove-core-clock", dove_coreclk_init);



/*

 * Clock Gating Control

 */
@@ -186,9 +180,14 @@ static const struct clk_gating_soc_desc dove_gating_desc[] __initconst = { 
	{ }

};



static void __init dove_clk_gating_init(struct device_node *np)

static void __init dove_clk_init(struct device_node *np)

{

	mvebu_clk_gating_setup(np, dove_gating_desc);

	struct device_node *cgnp =

		of_find_compatible_node(NULL, NULL, "marvell,dove-gating-clock");



	mvebu_coreclk_setup(np, &dove_coreclks);



	if (cgnp)

		mvebu_clk_gating_setup(cgnp, dove_gating_desc);

}

CLK_OF_DECLARE(dove_clk_gating, "marvell,dove-gating-clock",

	       dove_clk_gating_init);
 
CLK_OF_DECLARE(dove_clk, "marvell,dove-core-clock", dove_clk_init);

drivers/clk/mvebu/kirkwood.c

+16 −18
Original line number Diff line number Diff line
@@ -193,13 +193,6 @@ static const struct coreclk_soc_desc kirkwood_coreclks = { 
	.num_ratios = ARRAY_SIZE(kirkwood_coreclk_ratios),

};



static void __init kirkwood_coreclk_init(struct device_node *np)

{

	mvebu_coreclk_setup(np, &kirkwood_coreclks);

}

CLK_OF_DECLARE(kirkwood_core_clk, "marvell,kirkwood-core-clock",

	       kirkwood_coreclk_init);



static const struct coreclk_soc_desc mv88f6180_coreclks = {

	.get_tclk_freq = kirkwood_get_tclk_freq,

	.get_cpu_freq = mv88f6180_get_cpu_freq,
@@ -208,13 +201,6 @@ static const struct coreclk_soc_desc mv88f6180_coreclks = { 
	.num_ratios = ARRAY_SIZE(kirkwood_coreclk_ratios),

};



static void __init mv88f6180_coreclk_init(struct device_node *np)

{

	mvebu_coreclk_setup(np, &mv88f6180_coreclks);

}

CLK_OF_DECLARE(mv88f6180_core_clk, "marvell,mv88f6180-core-clock",

	       mv88f6180_coreclk_init);



/*

 * Clock Gating Control

 */
@@ -239,9 +225,21 @@ static const struct clk_gating_soc_desc kirkwood_gating_desc[] __initconst = { 
	{ }

};



static void __init kirkwood_clk_gating_init(struct device_node *np)

static void __init kirkwood_clk_init(struct device_node *np)

{

	mvebu_clk_gating_setup(np, kirkwood_gating_desc);

	struct device_node *cgnp =

		of_find_compatible_node(NULL, NULL, "marvell,kirkwood-gating-clock");





	if (of_device_is_compatible(np, "marvell,mv88f6180-core-clock"))

		mvebu_coreclk_setup(np, &mv88f6180_coreclks);

	else

		mvebu_coreclk_setup(np, &kirkwood_coreclks);



	if (cgnp)

		mvebu_clk_gating_setup(cgnp, kirkwood_gating_desc);

}

CLK_OF_DECLARE(kirkwood_clk_gating, "marvell,kirkwood-gating-clock",

	       kirkwood_clk_gating_init);
 
CLK_OF_DECLARE(kirkwood_clk, "marvell,kirkwood-core-clock",

	       kirkwood_clk_init);

CLK_OF_DECLARE(mv88f6180_clk, "marvell,mv88f6180-core-clock",

	       kirkwood_clk_init);

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