Commit 334d09c2 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-arm-soc-for-v5.11-tag1' of... 

Merge tag 'renesas-arm-soc-for-v5.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc

Renesas ARM SoC updates for v5.11

  - Stop using static I/O mappings and __raw_*() I/O accessors.

* tag 'renesas-arm-soc-for-v5.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: shmobile: Stop using __raw_*() I/O accessors
  ARM: shmobile: sh73a0: Remove obsolete static mapping
  ARM: shmobile: sh73a0: Use ioremap() to map SMP registers
  ARM: shmobile: sh73a0: Use ioremap() to map L2C registers
  ARM: shmobile: r8a7779: Remove obsolete static mappings
  ARM: shmobile: r8a7779: Use ioremap() to map SMP registers
  ARM: shmobile: r8a7779: Use ioremap() to map INTC2 registers
  ARM: shmobile: r8a7778: Introduce HPBREG_BASE

Link: https://lore.kernel.org/r/20201127132155.77418-3-geert@linux-m68k.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 31216ef5 d4a617c9

arch/arm/mach-shmobile/platsmp-scu.c

+1 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ static int shmobile_smp_scu_psr_core_disabled(int cpu) 
{

	unsigned long mask = SCU_PM_POWEROFF << (cpu * 8);



	if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)

	if ((readl(shmobile_scu_base + 8) & mask) == mask)

		return 1;



	return 0;

arch/arm/mach-shmobile/setup-r8a7778.c

+7 −5
Original line number Diff line number Diff line
@@ -14,6 +14,8 @@ 


#include "common.h"



#define HPBREG_BASE	0xfe700000



#define INT2SMSKCR0	0x82288 /* 0xfe782288 */

#define INT2SMSKCR1	0x8228c /* 0xfe78228c */
@@ -22,19 +24,19 @@ 


static void __init r8a7778_init_irq_dt(void)

{

	void __iomem *base = ioremap(0xfe700000, 0x00100000);

	void __iomem *base = ioremap(HPBREG_BASE, 0x00100000);



	BUG_ON(!base);



	irqchip_init();



	/* route all interrupts to ARM */

	__raw_writel(0x73ffffff, base + INT2NTSR0);

	__raw_writel(0xffffffff, base + INT2NTSR1);

	writel(0x73ffffff, base + INT2NTSR0);

	writel(0xffffffff, base + INT2NTSR1);



	/* unmask all known interrupts in INTCS2 */

	__raw_writel(0x08330773, base + INT2SMSKCR0);

	__raw_writel(0x00311110, base + INT2SMSKCR1);

	writel(0x08330773, base + INT2SMSKCR0);

	writel(0x00311110, base + INT2SMSKCR1);



	iounmap(base);

}

arch/arm/mach-shmobile/setup-r8a7779.c

+19 −37
Original line number Diff line number Diff line
@@ -15,53 +15,36 @@ 
#include "common.h"

#include "r8a7779.h"



static struct map_desc r8a7779_io_desc[] __initdata = {

	/* 2M identity mapping for 0xf0000000 (MPCORE) */

	{

		.virtual	= 0xf0000000,

		.pfn		= __phys_to_pfn(0xf0000000),

		.length		= SZ_2M,

		.type		= MT_DEVICE_NONSHARED

	},

	/* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */

	{

		.virtual	= 0xfe000000,

		.pfn		= __phys_to_pfn(0xfe000000),

		.length		= SZ_16M,

		.type		= MT_DEVICE_NONSHARED

	},

};



static void __init r8a7779_map_io(void)

{

	debug_ll_io_init();

	iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));

}

#define HPBREG_BASE	0xfe700000



/* IRQ */

#define INT2SMSKCR0 IOMEM(0xfe7822a0)

#define INT2SMSKCR1 IOMEM(0xfe7822a4)

#define INT2SMSKCR2 IOMEM(0xfe7822a8)

#define INT2SMSKCR3 IOMEM(0xfe7822ac)

#define INT2SMSKCR4 IOMEM(0xfe7822b0)

#define INT2SMSKCR0	0x822a0	/* Interrupt Submask Clear Register 0 */

#define INT2SMSKCR1	0x822a4	/* Interrupt Submask Clear Register 1 */

#define INT2SMSKCR2	0x822a8	/* Interrupt Submask Clear Register 2 */

#define INT2SMSKCR3	0x822ac	/* Interrupt Submask Clear Register 3 */

#define INT2SMSKCR4	0x822b0	/* Interrupt Submask Clear Register 4 */



#define INT2NTSR0 IOMEM(0xfe700060)

#define INT2NTSR1 IOMEM(0xfe700064)

#define INT2NTSR0	0x00060	/* Interrupt Notification Select Register 0 */

#define INT2NTSR1	0x00064	/* Interrupt Notification Select Register 1 */



static void __init r8a7779_init_irq_dt(void)

{

	void __iomem *base = ioremap(HPBREG_BASE, 0x00100000);



	irqchip_init();



	/* route all interrupts to ARM */

	__raw_writel(0xffffffff, INT2NTSR0);

	__raw_writel(0x3fffffff, INT2NTSR1);

	writel(0xffffffff, base + INT2NTSR0);

	writel(0x3fffffff, base + INT2NTSR1);



	/* unmask all known interrupts in INTCS2 */

	__raw_writel(0xfffffff0, INT2SMSKCR0);

	__raw_writel(0xfff7ffff, INT2SMSKCR1);

	__raw_writel(0xfffbffdf, INT2SMSKCR2);

	__raw_writel(0xbffffffc, INT2SMSKCR3);

	__raw_writel(0x003fee3f, INT2SMSKCR4);

	writel(0xfffffff0, base + INT2SMSKCR0);

	writel(0xfff7ffff, base + INT2SMSKCR1);

	writel(0xfffbffdf, base + INT2SMSKCR2);

	writel(0xbffffffc, base + INT2SMSKCR3);

	writel(0x003fee3f, base + INT2SMSKCR4);



	iounmap(base);

}



static const char *const r8a7779_compat_dt[] __initconst = {
@@ -71,7 +54,6 @@ static const char *const r8a7779_compat_dt[] __initconst = { 


DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")

	.smp		= smp_ops(r8a7779_smp_ops),

	.map_io		= r8a7779_map_io,

	.init_irq	= r8a7779_init_irq_dt,

	.init_late	= shmobile_init_late,

	.dt_compat	= r8a7779_compat_dt,

arch/arm/mach-shmobile/setup-sh73a0.c

+1 −20
Original line number Diff line number Diff line
@@ -22,29 +22,11 @@ 
#include "common.h"

#include "sh73a0.h"



static struct map_desc sh73a0_io_desc[] __initdata = {

	/* create a 1:1 identity mapping for 0xe6xxxxxx

	 * used by CPGA, INTC and PFC.

	 */

	{

		.virtual	= 0xe6000000,

		.pfn		= __phys_to_pfn(0xe6000000),

		.length		= 256 << 20,

		.type		= MT_DEVICE_NONSHARED

	},

};



static void __init sh73a0_map_io(void)

{

	debug_ll_io_init();

	iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc));

}



static void __init sh73a0_generic_init(void)

{

#ifdef CONFIG_CACHE_L2X0

	/* Shared attribute override enable, 64K*8way */

	l2x0_init(IOMEM(0xf0100000), 0x00400000, 0xc20f0fff);

	l2x0_init(ioremap(0xf0100000, PAGE_SIZE), 0x00400000, 0xc20f0fff);

#endif

}
@@ -55,7 +37,6 @@ static const char *const sh73a0_boards_compat_dt[] __initconst = { 


DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")

	.smp		= smp_ops(sh73a0_smp_ops),

	.map_io		= sh73a0_map_io,

	.init_machine	= sh73a0_generic_init,

	.init_late	= shmobile_init_late,

	.dt_compat	= sh73a0_boards_compat_dt,

arch/arm/mach-shmobile/smp-r8a7779.c

+9 −3
Original line number Diff line number Diff line
@@ -20,7 +20,9 @@ 
#include "common.h"

#include "r8a7779.h"



#define AVECR IOMEM(0xfe700040)

#define HPBREG_BASE		0xfe700000

#define AVECR			0x0040	/* ARM Reset Vector Address Register */



#define R8A7779_SCU_BASE	0xf0000000



static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -36,11 +38,15 @@ static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) 


static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)

{

	void __iomem *base = ioremap(HPBREG_BASE, 0x1000);



	/* Map the reset vector (in headsmp-scu.S, headsmp.S) */

	__raw_writel(__pa(shmobile_boot_vector), AVECR);

	writel(__pa(shmobile_boot_vector), base + AVECR);



	/* setup r8a7779 specific SCU bits */

	shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus);



	iounmap(base);

}



#ifdef CONFIG_HOTPLUG_CPU

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