Commit d4a617c9 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

ARM: shmobile: Stop using __raw_*() I/O accessors 



There is no reason to keep on using the __raw_{read,write}l() I/O
accessors in Renesas ARM platform code.  Switch to using the plain
{read,write}l() I/O accessors, to have a chance that this works on
big-endian.

Suggested-by: default avatarArnd Bergmann <arnd@kernel.org>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20201117142447.2205664-1-geert+renesas@glider.be
parent 5705747c

arch/arm/mach-shmobile/platsmp-scu.c

+1 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ static int shmobile_smp_scu_psr_core_disabled(int cpu) 
{

	unsigned long mask = SCU_PM_POWEROFF << (cpu * 8);



	if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)

	if ((readl(shmobile_scu_base + 8) & mask) == mask)

		return 1;



	return 0;

arch/arm/mach-shmobile/setup-r8a7778.c

+4 −4
Original line number Diff line number Diff line
@@ -31,12 +31,12 @@ static void __init r8a7778_init_irq_dt(void) 
	irqchip_init();



	/* route all interrupts to ARM */

	__raw_writel(0x73ffffff, base + INT2NTSR0);

	__raw_writel(0xffffffff, base + INT2NTSR1);

	writel(0x73ffffff, base + INT2NTSR0);

	writel(0xffffffff, base + INT2NTSR1);



	/* unmask all known interrupts in INTCS2 */

	__raw_writel(0x08330773, base + INT2SMSKCR0);

	__raw_writel(0x00311110, base + INT2SMSKCR1);

	writel(0x08330773, base + INT2SMSKCR0);

	writel(0x00311110, base + INT2SMSKCR1);



	iounmap(base);

}

arch/arm/mach-shmobile/setup-r8a7779.c

+7 −7
Original line number Diff line number Diff line
@@ -34,15 +34,15 @@ static void __init r8a7779_init_irq_dt(void) 
	irqchip_init();



	/* route all interrupts to ARM */

	__raw_writel(0xffffffff, base + INT2NTSR0);

	__raw_writel(0x3fffffff, base + INT2NTSR1);

	writel(0xffffffff, base + INT2NTSR0);

	writel(0x3fffffff, base + INT2NTSR1);



	/* unmask all known interrupts in INTCS2 */

	__raw_writel(0xfffffff0, base + INT2SMSKCR0);

	__raw_writel(0xfff7ffff, base + INT2SMSKCR1);

	__raw_writel(0xfffbffdf, base + INT2SMSKCR2);

	__raw_writel(0xbffffffc, base + INT2SMSKCR3);

	__raw_writel(0x003fee3f, base + INT2SMSKCR4);

	writel(0xfffffff0, base + INT2SMSKCR0);

	writel(0xfff7ffff, base + INT2SMSKCR1);

	writel(0xfffbffdf, base + INT2SMSKCR2);

	writel(0xbffffffc, base + INT2SMSKCR3);

	writel(0x003fee3f, base + INT2SMSKCR4);



	iounmap(base);

}

arch/arm/mach-shmobile/smp-r8a7779.c

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) 
	void __iomem *base = ioremap(HPBREG_BASE, 0x1000);



	/* Map the reset vector (in headsmp-scu.S, headsmp.S) */

	__raw_writel(__pa(shmobile_boot_vector), base + AVECR);

	writel(__pa(shmobile_boot_vector), base + AVECR);



	/* setup r8a7779 specific SCU bits */

	shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus);

arch/arm/mach-shmobile/smp-sh73a0.c

+5 −5
Original line number Diff line number Diff line
@@ -34,10 +34,10 @@ static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle) 
	unsigned int lcpu = cpu_logical_map(cpu);

	void __iomem *cpg2 = ioremap(CPG_BASE2, PAGE_SIZE);



	if (((__raw_readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3)

		__raw_writel(1 << lcpu, cpg2 + WUPCR);	/* wake up */

	if (((readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3)

		writel(1 << lcpu, cpg2 + WUPCR);	/* wake up */

	else

		__raw_writel(1 << lcpu, cpg2 + SRESCR);	/* reset */

		writel(1 << lcpu, cpg2 + SRESCR);	/* reset */

	iounmap(cpg2);

	return 0;

}
@@ -48,8 +48,8 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) 
	void __iomem *sysc = ioremap(SYSC_BASE, PAGE_SIZE);



	/* Map the reset vector (in headsmp.S) */

	__raw_writel(0, ap + APARMBAREA);      /* 4k */

	__raw_writel(__pa(shmobile_boot_vector), sysc + SBAR);

	writel(0, ap + APARMBAREA);      /* 4k */

	writel(__pa(shmobile_boot_vector), sysc + SBAR);

	iounmap(sysc);

	iounmap(ap);

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