Commit 32b5f4b6 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kevin Hilman
Browse files

arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock 



Add the "timing-adjustment" clock now that we know how it is connected
to the PRG_ETHERNET registers. It is used internally to generate the
RGMII RX delay on the MAC side (if needed).

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620162347.26159-1-martin.blumenstingl@googlemail.com
parent 5273d6ca

arch/arm64/boot/dts/amlogic/meson-axg.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -181,8 +181,10 @@ 
			interrupt-names = "macirq";

			clocks = <&clkc CLKID_ETH>,

				 <&clkc CLKID_FCLK_DIV2>,

				 <&clkc CLKID_MPLL2>;

			clock-names = "stmmaceth", "clkin0", "clkin1";

				 <&clkc CLKID_MPLL2>,

				 <&clkc CLKID_FCLK_DIV2>;

			clock-names = "stmmaceth", "clkin0", "clkin1",

				      "timing-adjustment";

			rx-fifo-depth = <4096>;

			tx-fifo-depth = <2048>;

			status = "disabled";

arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -185,8 +185,10 @@ 
			interrupt-names = "macirq";

			clocks = <&clkc CLKID_ETH>,

				 <&clkc CLKID_FCLK_DIV2>,

				 <&clkc CLKID_MPLL2>;

			clock-names = "stmmaceth", "clkin0", "clkin1";

				 <&clkc CLKID_MPLL2>,

				 <&clkc CLKID_FCLK_DIV2>;

			clock-names = "stmmaceth", "clkin0", "clkin1",

				      "timing-adjustment";

			rx-fifo-depth = <4096>;

			tx-fifo-depth = <2048>;

			status = "disabled";

arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -333,8 +333,9 @@ 
&ethmac {

	clocks = <&clkc CLKID_ETH>,

		 <&clkc CLKID_FCLK_DIV2>,

		 <&clkc CLKID_MPLL2>;

	clock-names = "stmmaceth", "clkin0", "clkin1";

		 <&clkc CLKID_MPLL2>,

		 <&clkc CLKID_FCLK_DIV2>;

	clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";

};



&gpio_intc {

arch/arm64/boot/dts/amlogic/meson-gxl.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -131,8 +131,9 @@ 
&ethmac {

	clocks = <&clkc CLKID_ETH>,

		 <&clkc CLKID_FCLK_DIV2>,

		 <&clkc CLKID_MPLL2>;

	clock-names = "stmmaceth", "clkin0", "clkin1";

		 <&clkc CLKID_MPLL2>,

		 <&clkc CLKID_FCLK_DIV2>;

	clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";



	mdio0: mdio {

		#address-cells = <1>;

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