Commit 5273d6ca authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kevin Hilman
Browse files

arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindings 



The "amlogic,meson-gx-pwrc-vpu" binding only supports the VPU power
domain, while actually there are more power domains behind that set of
registers. Switch to the new bindings so we can add more power domains
as needed.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161211.23685-1-martin.blumenstingl@googlemail.com
parent cabb1f38

arch/arm64/boot/dts/amlogic/meson-gx.dtsi

+10 −8
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/power/meson-gxbb-power.h>

#include <dt-bindings/thermal/thermal.h>



/ {
@@ -60,7 +61,7 @@ 
			compatible = "amlogic,simple-framebuffer",

				     "simple-framebuffer";

			amlogic,pipeline = "vpu-cvbs";

			power-domains = <&pwrc_vpu>;

			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;

			status = "disabled";

		};
@@ -68,7 +69,7 @@ 
			compatible = "amlogic,simple-framebuffer",

				     "simple-framebuffer";

			amlogic,pipeline = "vpu-hdmi";

			power-domains = <&pwrc_vpu>;

			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;

			status = "disabled";

		};

	};
@@ -438,12 +439,6 @@ 
				compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";

				reg =  <0x0 0x0 0x0 0x100>;



				pwrc_vpu: power-controller-vpu {

					compatible = "amlogic,meson-gx-pwrc-vpu";

					#power-domain-cells = <0>;

					amlogic,hhi-sysctrl = <&sysctrl>;

				};



				clkc_AO: clock-controller {

					compatible = "amlogic,meson-gx-aoclkc";

					#clock-cells = <1>;
@@ -552,6 +547,12 @@ 
			sysctrl: system-controller@0 {

				compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";

				reg = <0 0 0 0x400>;



				pwrc: power-controller {

					compatible = "amlogic,meson-gxbb-pwrc";

					#power-domain-cells = <1>;

					amlogic,ao-sysctrl = <&sysctrl_AO>;

				};

			};



			mailbox: mailbox@404 {
@@ -574,6 +575,7 @@ 
			interrupt-names = "macirq";

			rx-fifo-depth = <4096>;

			tx-fifo-depth = <2048>;

			power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;

			status = "disabled";

		};

arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

+5 −2
Original line number Diff line number Diff line
@@ -747,7 +747,7 @@ 
	};

};



&pwrc_vpu {

&pwrc {

	resets = <&reset RESET_VIU>,

		 <&reset RESET_VENC>,

		 <&reset RESET_VCBUS>,
@@ -760,6 +760,9 @@ 
		 <&reset RESET_VDI6>,

		 <&reset RESET_VENCL>,

		 <&reset RESET_VID_LOCK>;

	reset-names = "viu", "venc", "vcbus", "bt656",

		      "dvin", "rdma", "venci", "vencp",

		      "vdac", "vdi6", "vencl", "vid_lock";

	clocks = <&clkc CLKID_VPU>,

	         <&clkc CLKID_VAPB>;

	clock-names = "vpu", "vapb";
@@ -866,7 +869,7 @@ 


&vpu {

	compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";

	power-domains = <&pwrc_vpu>;

	power-domains = <&pwrc PWRC_GXBB_VPU_ID>;

};



&vdec {

arch/arm64/boot/dts/amlogic/meson-gxl.dtsi

+5 −2
Original line number Diff line number Diff line
@@ -782,7 +782,7 @@ 
	};

};



&pwrc_vpu {

&pwrc {

	resets = <&reset RESET_VIU>,

		 <&reset RESET_VENC>,

		 <&reset RESET_VCBUS>,
@@ -795,6 +795,9 @@ 
		 <&reset RESET_VDI6>,

		 <&reset RESET_VENCL>,

		 <&reset RESET_VID_LOCK>;

	reset-names = "viu", "venc", "vcbus", "bt656",

		      "dvin", "rdma", "venci", "vencp",

		      "vdac", "vdi6", "vencl", "vid_lock";

	clocks = <&clkc CLKID_VPU>,

	         <&clkc CLKID_VAPB>;

	clock-names = "vpu", "vapb";
@@ -901,7 +904,7 @@ 


&vpu {

	compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";

	power-domains = <&pwrc_vpu>;

	power-domains = <&pwrc PWRC_GXBB_VPU_ID>;

};



&vdec {

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