Commit 32a1795f authored by Jyri Sarha's avatar Jyri Sarha
Browse files

drm/tidss: New driver for TI Keystone platform Display SubSystem 



This patch adds a new DRM driver for Texas Instruments DSS IPs used on
Texas Instruments Keystone K2G, AM65x, and J721e SoCs. The new DSS IP is
a major change to the older DSS IP versions, which are supported by
the omapdrm driver. While on higher level the Keystone DSS resembles
the older DSS versions, the registers are completely different and the
internal pipelines differ a lot.

DSS IP found on K2G is an "ultra-light" version, and has only a single
plane and a single output. The K3 DSS IPs are found on AM65x and J721E
SoCs. AM65x DSS has two video ports, one full video plane, and another
"lite" plane without scaling support. J721E has 4 video ports, 2 video
planes and 2 lite planes. AM65x DSS has also an integrated OLDI (LVDS)
output.

Version history:

v2: - rebased on top of drm-next-2019-11-27
    - sort all include lines in all files
    - remove all include <drm/drmP.h>
    - remove select "select VIDEOMODE_HELPERS"
    - call dispc_vp_setup() later in tidss_crtc_atomic_flush() (there is no
      to call it in new modeset case as it is also called in vp_enable())
    - change probe sequence and drm_device allocation (follow example in
      drm_drv.c)
    - use __maybe_unused instead of #ifdef for pm functions
    - remove "struct drm_fbdev_cma *fbdev;" from driver data
    - check panel connector type before connecting it

v3: no change

v4: no change

v5: - remove fifo underflow irq handling, it is not an error and
      it should be used for debug purposes only
    - memory tuning, prefetch plane fifo up to high-threshold value to
      minimize possibility of underflows.

v6: - Check CTM and gamma support from dispc_features when creating crtc
    - Implement CTM support for k2g and fix k3 CTM implementation
    - Remove gamma property persistence and always write color properties
      in a new modeset

v7: - Fix checkpatch.pl --strict issues
    - Rebase on top of drm-misc-next-2020-01-10

v8: - Remove idle debug prints from dispc_init()
    - Add Reviewed-by: default avatarBenoit Parrot <bparrot@ti.com>

v9: - Rename dispc_write_irqenable() to dispc_set_irqenable() to avoid
      conflict exported omapfb function with same name
    - Add Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>

Co-developed-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: default avatarJyri Sarha <jsarha@ti.com>
Acked-by: default avatarSam Ravnborg <sam@ravnborg.org>
Reviewed-by: default avatarBenoit Parrot <bparrot@ti.com>
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/925fbfad58ff828e8e07fdff7073a0ee65750c3d.1580129724.git.jsarha@ti.com
parent 6057317c

drivers/gpu/drm/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -389,6 +389,8 @@ source "drivers/gpu/drm/aspeed/Kconfig" 


source "drivers/gpu/drm/mcde/Kconfig"



source "drivers/gpu/drm/tidss/Kconfig"



# Keep legacy drivers last



menuconfig DRM_LEGACY

drivers/gpu/drm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -122,3 +122,4 @@ obj-$(CONFIG_DRM_LIMA) += lima/ 
obj-$(CONFIG_DRM_PANFROST) += panfrost/

obj-$(CONFIG_DRM_ASPEED_GFX) += aspeed/

obj-$(CONFIG_DRM_MCDE) += mcde/

obj-$(CONFIG_DRM_TIDSS) += tidss/

drivers/gpu/drm/tidss/Kconfig

0 → 100644
+14 −0
Original line number Diff line number Diff line 
config DRM_TIDSS

	tristate "DRM Support for TI Keystone"

	depends on DRM && OF

	depends on ARM || ARM64 || COMPILE_TEST

	select DRM_KMS_HELPER

	select DRM_KMS_CMA_HELPER

	select DRM_GEM_CMA_HELPER

	help

	  The TI Keystone family SoCs introduced a new generation of

	  Display SubSystem. There is currently three Keystone family

	  SoCs released with DSS. Each with somewhat different version

	  of it. The SoCs are 66AK2Gx, AM65x, and J721E. Set this to Y

	  or M to add display support for TI Keystone family

	  platforms.

drivers/gpu/drm/tidss/Makefile

0 → 100644
+12 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0



tidss-y := tidss_crtc.o \

	tidss_drv.o \

	tidss_encoder.o \

	tidss_kms.o \

	tidss_irq.o \

	tidss_plane.o \

	tidss_scale_coefs.o \

	tidss_dispc.o



obj-$(CONFIG_DRM_TIDSS) += tidss.o

drivers/gpu/drm/tidss/tidss_crtc.c

0 → 100644
+377 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/

 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>

 */



#include <drm/drm_atomic.h>

#include <drm/drm_atomic_helper.h>

#include <drm/drm_crtc.h>

#include <drm/drm_crtc_helper.h>

#include <drm/drm_fb_cma_helper.h>

#include <drm/drm_gem_cma_helper.h>

#include <drm/drm_plane_helper.h>

#include <drm/drm_vblank.h>



#include "tidss_crtc.h"

#include "tidss_dispc.h"

#include "tidss_drv.h"

#include "tidss_irq.h"



/* Page flip and frame done IRQs */



static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc)

{

	struct drm_device *ddev = tcrtc->crtc.dev;

	struct tidss_device *tidss = ddev->dev_private;

	struct drm_pending_vblank_event *event;

	unsigned long flags;

	bool busy;



	spin_lock_irqsave(&ddev->event_lock, flags);



	/*

	 * New settings are taken into use at VFP, and GO bit is cleared at

	 * the same time. This happens before the vertical blank interrupt.

	 * So there is a small change that the driver sets GO bit after VFP, but

	 * before vblank, and we have to check for that case here.

	 */

	busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport);

	if (busy) {

		spin_unlock_irqrestore(&ddev->event_lock, flags);

		return;

	}



	event = tcrtc->event;

	tcrtc->event = NULL;



	if (!event) {

		spin_unlock_irqrestore(&ddev->event_lock, flags);

		return;

	}



	drm_crtc_send_vblank_event(&tcrtc->crtc, event);



	spin_unlock_irqrestore(&ddev->event_lock, flags);



	drm_crtc_vblank_put(&tcrtc->crtc);

}



void tidss_crtc_vblank_irq(struct drm_crtc *crtc)

{

	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);



	drm_crtc_handle_vblank(crtc);



	tidss_crtc_finish_page_flip(tcrtc);

}



void tidss_crtc_framedone_irq(struct drm_crtc *crtc)

{

	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);



	complete(&tcrtc->framedone_completion);

}



void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus)

{

	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);



	dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n",

			    tcrtc->hw_videoport, irqstatus);

}



/* drm_crtc_helper_funcs */



static int tidss_crtc_atomic_check(struct drm_crtc *crtc,

				   struct drm_crtc_state *state)

{

	struct drm_device *ddev = crtc->dev;

	struct tidss_device *tidss = ddev->dev_private;

	struct dispc_device *dispc = tidss->dispc;

	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

	u32 hw_videoport = tcrtc->hw_videoport;

	const struct drm_display_mode *mode;

	enum drm_mode_status ok;



	dev_dbg(ddev->dev, "%s\n", __func__);



	if (!state->enable)

		return 0;



	mode = &state->adjusted_mode;



	ok = dispc_vp_mode_valid(dispc, hw_videoport, mode);

	if (ok != MODE_OK) {

		dev_dbg(ddev->dev, "%s: bad mode: %ux%u pclk %u kHz\n",

			__func__, mode->hdisplay, mode->vdisplay, mode->clock);

		return -EINVAL;

	}



	return dispc_vp_bus_check(dispc, hw_videoport, state);

}



static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,

				    struct drm_crtc_state *old_crtc_state)

{

	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

	struct drm_device *ddev = crtc->dev;

	struct tidss_device *tidss = ddev->dev_private;

	unsigned long flags;



	dev_dbg(ddev->dev,

		"%s: %s enabled %d, needs modeset %d, event %p\n", __func__,

		crtc->name, drm_atomic_crtc_needs_modeset(crtc->state),

		crtc->state->enable, crtc->state->event);



	/* There is nothing to do if CRTC is not going to be enabled. */

	if (!crtc->state->enable)

		return;



	/*

	 * Flush CRTC changes with go bit only if new modeset is not

	 * coming, so CRTC is enabled trough out the commit.

	 */

	if (drm_atomic_crtc_needs_modeset(crtc->state))

		return;



	/* If the GO bit is stuck we better quit here. */

	if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport)))

		return;



	/* We should have event if CRTC is enabled through out this commit. */

	if (WARN_ON(!crtc->state->event))

		return;



	/* Write vp properties to HW if needed. */

	dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);



	WARN_ON(drm_crtc_vblank_get(crtc) != 0);



	spin_lock_irqsave(&ddev->event_lock, flags);

	dispc_vp_go(tidss->dispc, tcrtc->hw_videoport);



	WARN_ON(tcrtc->event);



	tcrtc->event = crtc->state->event;

	crtc->state->event = NULL;



	spin_unlock_irqrestore(&ddev->event_lock, flags);

}



static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,

				     struct drm_crtc_state *old_state)

{

	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

	struct drm_device *ddev = crtc->dev;

	struct tidss_device *tidss = ddev->dev_private;

	const struct drm_display_mode *mode = &crtc->state->adjusted_mode;

	unsigned long flags;

	int r;



	dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);



	tidss_runtime_get(tidss);



	r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport,

				  mode->clock * 1000);

	if (r != 0)

		return;



	r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport);

	if (r != 0)

		return;



	dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);



	/* Turn vertical blanking interrupt reporting on. */

	drm_crtc_vblank_on(crtc);



	dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state);



	dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport, crtc->state);



	spin_lock_irqsave(&ddev->event_lock, flags);



	if (crtc->state->event) {

		drm_crtc_send_vblank_event(crtc, crtc->state->event);

		crtc->state->event = NULL;

	}



	spin_unlock_irqrestore(&ddev->event_lock, flags);

}



static void tidss_crtc_atomic_disable(struct drm_crtc *crtc,

				      struct drm_crtc_state *old_state)

{

	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

	struct drm_device *ddev = crtc->dev;

	struct tidss_device *tidss = ddev->dev_private;

	unsigned long flags;



	dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);



	reinit_completion(&tcrtc->framedone_completion);



	dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport);



	if (!wait_for_completion_timeout(&tcrtc->framedone_completion,

					 msecs_to_jiffies(500)))

		dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d",

			tcrtc->hw_videoport);



	dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport);



	spin_lock_irqsave(&ddev->event_lock, flags);

	if (crtc->state->event) {

		drm_crtc_send_vblank_event(crtc, crtc->state->event);

		crtc->state->event = NULL;

	}

	spin_unlock_irqrestore(&ddev->event_lock, flags);



	drm_crtc_vblank_off(crtc);



	dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport);



	tidss_runtime_put(tidss);

}



static

enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc,

					   const struct drm_display_mode *mode)

{

	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);

	struct drm_device *ddev = crtc->dev;

	struct tidss_device *tidss = ddev->dev_private;



	return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode);

}



static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = {

	.atomic_check = tidss_crtc_atomic_check,

	.atomic_flush = tidss_crtc_atomic_flush,

	.atomic_enable = tidss_crtc_atomic_enable,

	.atomic_disable = tidss_crtc_atomic_disable,



	.mode_valid = tidss_crtc_mode_valid,

};



/* drm_crtc_funcs */



static int tidss_crtc_enable_vblank(struct drm_crtc *crtc)

{

	struct drm_device *ddev = crtc->dev;

	struct tidss_device *tidss = ddev->dev_private;



	dev_dbg(ddev->dev, "%s\n", __func__);



	tidss_runtime_get(tidss);



	tidss_irq_enable_vblank(crtc);



	return 0;

}



static void tidss_crtc_disable_vblank(struct drm_crtc *crtc)

{

	struct drm_device *ddev = crtc->dev;

	struct tidss_device *tidss = ddev->dev_private;



	dev_dbg(ddev->dev, "%s\n", __func__);



	tidss_irq_disable_vblank(crtc);



	tidss_runtime_put(tidss);

}



static void tidss_crtc_reset(struct drm_crtc *crtc)

{

	struct tidss_crtc_state *tcrtc;



	if (crtc->state)

		__drm_atomic_helper_crtc_destroy_state(crtc->state);



	kfree(crtc->state);



	tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);

	if (!tcrtc) {

		crtc->state = NULL;

		return;

	}



	crtc->state = &tcrtc->base;

	crtc->state->crtc = crtc;

}



static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc)

{

	struct tidss_crtc_state *state, *current_state;



	if (WARN_ON(!crtc->state))

		return NULL;



	current_state = to_tidss_crtc_state(crtc->state);



	state = kmalloc(sizeof(*state), GFP_KERNEL);

	if (!state)

		return NULL;



	__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);



	state->bus_format = current_state->bus_format;

	state->bus_flags = current_state->bus_flags;



	return &state->base;

}



static const struct drm_crtc_funcs tidss_crtc_funcs = {

	.reset = tidss_crtc_reset,

	.destroy = drm_crtc_cleanup,

	.set_config = drm_atomic_helper_set_config,

	.page_flip = drm_atomic_helper_page_flip,

	.atomic_duplicate_state = tidss_crtc_duplicate_state,

	.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,

	.enable_vblank = tidss_crtc_enable_vblank,

	.disable_vblank = tidss_crtc_disable_vblank,

};



struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss,

				     u32 hw_videoport,

				     struct drm_plane *primary)

{

	struct tidss_crtc *tcrtc;

	struct drm_crtc *crtc;

	unsigned int gamma_lut_size = 0;

	bool has_ctm = tidss->feat->vp_feat.color.has_ctm;

	int ret;



	tcrtc = devm_kzalloc(tidss->dev, sizeof(*tcrtc), GFP_KERNEL);

	if (!tcrtc)

		return ERR_PTR(-ENOMEM);



	tcrtc->hw_videoport = hw_videoport;

	init_completion(&tcrtc->framedone_completion);



	crtc =  &tcrtc->crtc;



	ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary,

					NULL, &tidss_crtc_funcs, NULL);

	if (ret < 0)

		return ERR_PTR(ret);



	drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs);



	/*

	 * The dispc gamma functions adapt to what ever size we ask

	 * from it no matter what HW supports. X-server assumes 256

	 * element gamma tables so lets use that.

	 */

	if (tidss->feat->vp_feat.color.gamma_size)

		gamma_lut_size = 256;



	drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size);

	if (gamma_lut_size)

		drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size);



	return tcrtc;

}

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