Commit 31535a40 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amd/powerplay: add function to update overdrive settings 



Add function of smu_update_specified_od8_value to modify specified
overdrive value.
Add fucntion of smu_update_od8_settings to update overdrive table.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarKevin Wang <kevin1.wang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dfbd1187

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

+10 −0
Original line number Diff line number Diff line
@@ -410,6 +410,9 @@ struct pptable_funcs { 
	int (*print_clk_levels)(struct smu_context *smu, enum pp_clock_type type, char *buf);

	int (*force_clk_levels)(struct smu_context *smu, enum pp_clock_type type, uint32_t mask);

	int (*set_default_od8_settings)(struct smu_context *smu);

	int (*update_specified_od8_value)(struct smu_context *smu,

					  uint32_t index,

					  uint32_t value);

	int (*get_od_percentage)(struct smu_context *smu, enum pp_clock_type type);

	int (*get_clock_by_type_with_latency)(struct smu_context *smu,

					      enum amd_pp_clock_type type,
@@ -498,6 +501,9 @@ struct smu_funcs 
	int (*conv_power_profile_to_pplib_workload)(int power_profile);

	int (*get_power_profile_mode)(struct smu_context *smu, char *buf);

	int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size);

	int (*update_od8_settings)(struct smu_context *smu,

				   uint32_t index,

				   uint32_t value);

};



#define smu_init_microcode(smu) \
@@ -546,6 +552,8 @@ struct smu_funcs 
	((smu)->funcs->init_max_sustainable_clocks ? (smu)->funcs->init_max_sustainable_clocks((smu)) : 0)

#define smu_set_od8_default_settings(smu) \

	((smu)->funcs->set_od8_default_settings ? (smu)->funcs->set_od8_default_settings((smu)) : 0)

#define smu_update_od8_settings(smu, index, value) \

	((smu)->funcs->update_od8_settings ? (smu)->funcs->update_od8_settings((smu), (index), (value)) : 0)

#define smu_send_smc_msg(smu, msg) \

	((smu)->funcs->send_smc_msg? (smu)->funcs->send_smc_msg((smu), (msg)) : 0)

#define smu_send_smc_msg_with_param(smu, msg, param) \
@@ -578,6 +586,8 @@ struct smu_funcs 
	((smu)->ppt_funcs->populate_umd_state_clk ? (smu)->ppt_funcs->populate_umd_state_clk((smu)) : 0)

#define smu_set_default_od8_settings(smu) \

	((smu)->ppt_funcs->set_default_od8_settings ? (smu)->ppt_funcs->set_default_od8_settings((smu)) : 0)

#define smu_update_specified_od8_value(smu, index, value) \

	((smu)->ppt_funcs->update_specified_od8_value ? (smu)->ppt_funcs->update_specified_od8_value((smu), (index), (value)) : 0)

#define smu_get_power_limit(smu) \

	((smu)->funcs->get_power_limit? (smu)->funcs->get_power_limit((smu)) : 0)

#define smu_get_current_clk_freq(smu, clk_id, value) \

drivers/gpu/drm/amd/powerplay/smu_v11_0.c

+27 −0
Original line number Diff line number Diff line
@@ -1524,6 +1524,32 @@ static int smu_v11_0_set_power_profile_mode(struct smu_context *smu, long *input 
	return ret;

}



static int smu_v11_0_update_od8_settings(struct smu_context *smu,

					uint32_t index,

					uint32_t value)

{

	struct smu_table_context *table_context = &smu->smu_table;

	int ret;



	ret = smu_update_table(smu, TABLE_OVERDRIVE,

			       table_context->overdrive_table, false);

	if (ret) {

		pr_err("Failed to export over drive table!\n");

		return ret;

	}



	smu_update_specified_od8_value(smu, index, value);



	ret = smu_update_table(smu, TABLE_OVERDRIVE,

			       table_context->overdrive_table, true);

	if (ret) {

		pr_err("Failed to import over drive table!\n");

		return ret;

	}



	return 0;

}



static const struct smu_funcs smu_v11_0_funcs = {

	.init_microcode = smu_v11_0_init_microcode,

	.load_microcode = smu_v11_0_load_microcode,
@@ -1567,6 +1593,7 @@ static const struct smu_funcs smu_v11_0_funcs = { 
	.conv_power_profile_to_pplib_workload = smu_v11_0_conv_power_profile_to_pplib_workload,

	.get_power_profile_mode = smu_v11_0_get_power_profile_mode,

	.set_power_profile_mode = smu_v11_0_set_power_profile_mode,

	.update_od8_settings = smu_v11_0_update_od8_settings,

};



void smu_v11_0_set_smu_funcs(struct smu_context *smu)

drivers/gpu/drm/amd/powerplay/vega20_ppt.c

+78 −0
Original line number Diff line number Diff line
@@ -1847,6 +1847,83 @@ failed: 
	return ret;

}



static int vega20_update_specified_od8_value(struct smu_context *smu,

					     uint32_t index,

					     uint32_t value)

{

	struct smu_table_context *table_context = &smu->smu_table;

	OverDriveTable_t *od_table =

		(OverDriveTable_t *)(table_context->overdrive_table);

	struct vega20_od8_settings *od8_settings =

		(struct vega20_od8_settings *)table_context->od8_settings;



	switch (index) {

	case OD8_SETTING_GFXCLK_FMIN:

		od_table->GfxclkFmin = (uint16_t)value;

		break;



	case OD8_SETTING_GFXCLK_FMAX:

		if (value < od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].min_value ||

		    value > od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].max_value)

			return -EINVAL;

		od_table->GfxclkFmax = (uint16_t)value;

		break;



	case OD8_SETTING_GFXCLK_FREQ1:

		od_table->GfxclkFreq1 = (uint16_t)value;

		break;



	case OD8_SETTING_GFXCLK_VOLTAGE1:

		od_table->GfxclkVolt1 = (uint16_t)value;

		break;



	case OD8_SETTING_GFXCLK_FREQ2:

		od_table->GfxclkFreq2 = (uint16_t)value;

		break;



	case OD8_SETTING_GFXCLK_VOLTAGE2:

		od_table->GfxclkVolt2 = (uint16_t)value;

		break;



	case OD8_SETTING_GFXCLK_FREQ3:

		od_table->GfxclkFreq3 = (uint16_t)value;

		break;



	case OD8_SETTING_GFXCLK_VOLTAGE3:

		od_table->GfxclkVolt3 = (uint16_t)value;

		break;



	case OD8_SETTING_UCLK_FMAX:

		if (value < od8_settings->od8_settings_array[OD8_SETTING_UCLK_FMAX].min_value ||

		    value > od8_settings->od8_settings_array[OD8_SETTING_UCLK_FMAX].max_value)

			return -EINVAL;

		od_table->UclkFmax = (uint16_t)value;

		break;



	case OD8_SETTING_POWER_PERCENTAGE:

		od_table->OverDrivePct = (int16_t)value;

		break;



	case OD8_SETTING_FAN_ACOUSTIC_LIMIT:

		od_table->FanMaximumRpm = (uint16_t)value;

		break;



	case OD8_SETTING_FAN_MIN_SPEED:

		od_table->FanMinimumPwm = (uint16_t)value;

		break;



	case OD8_SETTING_FAN_TARGET_TEMP:

		od_table->FanTargetTemperature = (uint16_t)value;

		break;



	case OD8_SETTING_OPERATING_TEMP_MAX:

		od_table->MaxOpTemp = (uint16_t)value;

		break;

	}



	return 0;

}



static const struct pptable_funcs vega20_ppt_funcs = {

	.alloc_dpm_context = vega20_allocate_dpm_context,

	.store_powerplay_table = vega20_store_powerplay_table,
@@ -1866,6 +1943,7 @@ static const struct pptable_funcs vega20_ppt_funcs = { 
	.get_od_percentage = vega20_get_od_percentage,

	.get_performance_level = vega20_get_performance_level,

	.force_performance_level = vega20_force_performance_level,

	.update_specified_od8_value = vega20_update_specified_od8_value,

};



void vega20_set_ppt_funcs(struct smu_context *smu)

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