Commit dfbd1187 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amd/powerplay: add sys interface for pcie for smu 



Add sys interface for set/get PCIE info for SMU.
The related operate will do nothing as vega20 do not support it now.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarKevin Wang <kevin1.wang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9a431038

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c

+6 −2
Original line number Diff line number Diff line
@@ -1004,7 +1004,9 @@ static ssize_t amdgpu_get_pp_dpm_pcie(struct device *dev, 
	struct drm_device *ddev = dev_get_drvdata(dev);

	struct amdgpu_device *adev = ddev->dev_private;



	if (adev->powerplay.pp_funcs->print_clock_levels)

	if (is_support_sw_smu(adev))

		return smu_print_clk_levels(&adev->smu, PP_PCIE, buf);

	else if (adev->powerplay.pp_funcs->print_clock_levels)

		return amdgpu_dpm_print_clock_levels(adev, PP_PCIE, buf);

	else

		return snprintf(buf, PAGE_SIZE, "\n");
@@ -1024,7 +1026,9 @@ static ssize_t amdgpu_set_pp_dpm_pcie(struct device *dev, 
	if (ret)

		return ret;



	if (adev->powerplay.pp_funcs->force_clock_level)

	if (is_support_sw_smu(adev))

		ret = smu_force_clk_levels(&adev->smu, PP_PCIE, mask);

	else if (adev->powerplay.pp_funcs->force_clock_level)

		ret = amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask);



	if (ret)

drivers/gpu/drm/amd/powerplay/vega20_ppt.c

+6 −0
Original line number Diff line number Diff line
@@ -775,6 +775,9 @@ static int vega20_print_clk_levels(struct smu_context *smu, 
				? "*" : "");

		break;



	case PP_PCIE:

		break;



	case OD_SCLK:

		if (od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMIN].feature_id &&

		    od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].feature_id) {
@@ -1016,6 +1019,9 @@ static int vega20_force_clk_levels(struct smu_context *smu, 


		break;



	case PP_PCIE:

		break;



	default:

		break;

	}

CRA Git | Maintained and supported by SUSTech CRA and CCSE