Commit 30b84288 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull arm-soc: soc specific changes (part 2) from Olof Johansson:
 "This adds support for the spear13xx platform, which has first been
  under review a long time ago and finally been completed after generic
  spear work has gone into the clock, dt and pinctrl branches.

  Also a number of updates for the samsung socs are part of this branch."

Fix up trivial conflicts in drivers/gpio/gpio-samsung.c that look much
worse than they are: the exonys5 init code was refactored in commit
fd454997 ("gpio: samsung: refactor gpiolib init for exynos4/5"), and
then commit f10590c9 ("ARM: EXYNOS: add GPC4 bank instance") added a
new gpio chip define and did tiny updates to the init code.

So the conflict diff looks like hell, but it's actually a fairly simple
change.

* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
  ARM: exynos: fix building with CONFIG_OF disabled
  ARM: EXYNOS: Add AUXDATA for i2c controllers
  ARM: dts: Update device tree source files for EXYNOS5250
  ARM: EXYNOS: Add device tree support for interrupt combiner
  ARM: EXYNOS: Add irq_domain support for interrupt combiner
  ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5
  ARM: EXYNOS: update irqs for EXYNOS5250 SoC
  ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll
  ARM: EXYNOS: add GPC4 bank instance
  ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition
  ARM: EXYNOS: Modify the GIC physical address for static io-mapping
  ARM: EXYNOS: Add watchdog timer clock instance
  pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res
  SPEAr: Update MAINTAINERS and Documentation
  SPEAr13xx: Add defconfig
  SPEAr13xx: Add compilation support
  SPEAr13xx: Add dts and dtsi files
  pinctrl: Add SPEAr13xx pinctrl drivers
  pinctrl: SPEAr: Create macro for declaring GPIO PINS
  SPEAr13xx: Add common clock framework support
  ...
parents 84a442b9 820f3dd7

Documentation/arm/SPEAr/overview.txt

+17 −15
Original line number Diff line number Diff line
@@ -8,9 +8,8 @@ Introduction 
  weblink : http://www.st.com/spear



  The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are

  supported by the 'spear' platform of ARM Linux. Currently SPEAr300,

  SPEAr310, SPEAr320 and SPEAr600 SOCs are supported. Support for the SPEAr13XX

  series is in progress.

  supported by the 'spear' platform of ARM Linux. Currently SPEAr1310,

  SPEAr1340, SPEAr300, SPEAr310, SPEAr320 and SPEAr600 SOCs are supported.



  Hierarchy in SPEAr is as follows:
@@ -26,33 +25,36 @@ Introduction 
		- SPEAr600 (SOC)

			- SPEAr600 Evaluation Board

	- SPEAr13XX (13XX SOC series, based on ARM CORTEXA9)

		- SPEAr1300 (SOC)

		- SPEAr1310 (SOC)

			- SPEAr1310 Evaluation Board

		- SPEAr1340 (SOC)

			- SPEAr1340 Evaluation Board



  Configuration

  -------------



  A generic configuration is provided for each machine, and can be used as the

  default by

	make spear600_defconfig

	make spear300_defconfig

	make spear310_defconfig

	make spear320_defconfig

	make spear13xx_defconfig

	make spear3xx_defconfig

	make spear6xx_defconfig



  Layout

  ------



  The common files for multiple machine families (SPEAr3XX, SPEAr6XX and

  SPEAr13XX) are located in the platform code contained in arch/arm/plat-spear

  The common files for multiple machine families (SPEAr3xx, SPEAr6xx and

  SPEAr13xx) are located in the platform code contained in arch/arm/plat-spear

  with headers in plat/.



  Each machine series have a directory with name arch/arm/mach-spear followed by

  series name. Like mach-spear3xx, mach-spear6xx and mach-spear13xx.



  Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c and for

  spear6xx is mach-spear6xx/spear6xx.c. mach-spear* also contain soc/machine

  specific files, like spear300.c, spear310.c, spear320.c and spear600.c.

  mach-spear* doesn't contains board specific files as they fully support

  Flattened Device Tree.

  Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c, for

  spear6xx is mach-spear6xx/spear6xx.c and for spear13xx family is

  mach-spear13xx/spear13xx.c. mach-spear* also contain soc/machine specific

  files, like spear1310.c, spear1340.c spear300.c, spear310.c, spear320.c and

  spear600.c.  mach-spear* doesn't contains board specific files as they fully

  support Flattened Device Tree.





  Document Author

Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt

0 → 100644
+52 −0
Original line number Diff line number Diff line 
* Samsung Exynos Interrupt Combiner Controller



Samsung's Exynos4 architecture includes a interrupt combiner controller which

can combine interrupt sources as a group and provide a single interrupt request

for the group. The interrupt request from each group are connected to a parent

interrupt controller, such as GIC in case of Exynos4210.



The interrupt combiner controller consists of multiple combiners. Upto eight

interrupt sources can be connected to a combiner. The combiner outputs one

combined interrupt for its eight interrupt sources. The combined interrupt

is usually connected to a parent interrupt controller.



A single node in the device tree is used to describe the interrupt combiner

controller module (which includes multiple combiners). A combiner in the

interrupt controller module shares config/control registers with other

combiners. For example, a 32-bit interrupt enable/disable config register

can accommodate upto 4 interrupt combiners (with each combiner supporting

upto 8 interrupt sources).



Required properties:

- compatible: should be "samsung,exynos4210-combiner".

- interrupt-controller: Identifies the node as an interrupt controller.

- #interrupt-cells: should be <2>. The meaning of the cells are

	* First Cell: Combiner Group Number.

	* Second Cell: Interrupt number within the group.

- reg: Base address and size of interrupt combiner registers.

- interrupts: The list of interrupts generated by the combiners which are then

    connected to a parent interrupt controller. The format of the interrupt

    specifier depends in the interrupt parent controller.



Optional properties:

- samsung,combiner-nr: The number of interrupt combiners supported. If this

  property is not specified, the default number of combiners is assumed

  to be 16.

- interrupt-parent: pHandle of the parent interrupt controller, if not

  inherited from the parent node.





Example:



	The following is a an example from the Exynos4210 SoC dtsi file.



	combiner:interrupt-controller@10440000 {

		compatible = "samsung,exynos4210-combiner";

		interrupt-controller;

		#interrupt-cells = <2>;

		reg = <0x10440000 0x1000>;

		interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,

			     <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,

			     <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,

			     <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;

	};

Documentation/devicetree/bindings/arm/spear.txt

+7 −7
Original line number Diff line number Diff line
@@ -2,25 +2,25 @@ ST SPEAr Platforms Device Tree Bindings 
---------------------------------------



Boards with the ST SPEAr600 SoC shall have the following properties:



Required root node property:



compatible = "st,spear600";



Boards with the ST SPEAr300 SoC shall have the following properties:



Required root node property:



compatible = "st,spear300";



Boards with the ST SPEAr310 SoC shall have the following properties:



Required root node property:



compatible = "st,spear310";



Boards with the ST SPEAr320 SoC shall have the following properties:

Required root node property:

compatible = "st,spear320";



Boards with the ST SPEAr1310 SoC shall have the following properties:

Required root node property:

compatible = "st,spear1310";



compatible = "st,spear320";
 
Boards with the ST SPEAr1340 SoC shall have the following properties:

Required root node property:

compatible = "st,spear1340";

Documentation/devicetree/bindings/pinctrl/pinctrl_spear.txt

+47 −0
Original line number Diff line number Diff line
@@ -4,6 +4,8 @@ Required properties: 
- compatible	: "st,spear300-pinmux"

		: "st,spear310-pinmux"

		: "st,spear320-pinmux"

		: "st,spear1310-pinmux"

		: "st,spear1340-pinmux"

- reg		: Address range of the pinctrl registers

- st,pinmux-mode: Mandatory for SPEAr300 and SPEAr320 and invalid for others.

	- Its values for SPEAr300:
@@ -89,6 +91,37 @@ For SPEAr320 machines: 
	"rmii0_1_grp", "i2c1_8_9_grp", "i2c1_98_99_grp", "i2c2_0_1_grp",

	"i2c2_2_3_grp", "i2c2_19_20_grp", "i2c2_75_76_grp", "i2c2_96_97_grp"



For SPEAr1310 machines:

	"i2c0_grp", "ssp0_grp", "ssp0_cs0_grp", "ssp0_cs1_2_grp", "i2s0_grp",

	"i2s1_grp", "clcd_grp", "clcd_high_res_grp", "arm_gpio_grp",

	"smi_2_chips_grp", "smi_4_chips_grp", "gmii_grp", "rgmii_grp",

	"smii_0_1_2_grp", "ras_mii_txclk_grp", "nand_8bit_grp",

	"nand_16bit_grp", "nand_4_chips_grp", "keyboard_6x6_grp",

	"keyboard_rowcol6_8_grp", "uart0_grp", "uart0_modem_grp",

	"gpt0_tmr0_grp", "gpt0_tmr1_grp", "gpt1_tmr0_grp", "gpt1_tmr1_grp",

	"sdhci_grp", "cf_grp", "xd_grp", "touch_xy_grp",

	"uart1_disable_i2c_grp", "uart1_disable_sd_grp", "uart2_3_grp",

	"uart4_grp", "uart5_grp", "rs485_0_1_tdm_0_1_grp", "i2c_1_2_grp",

	"i2c3_dis_smi_clcd_grp", "i2c3_dis_sd_i2s0_grp", "i2c_4_5_dis_smi_grp",

	"i2c4_dis_sd_grp", "i2c5_dis_sd_grp", "i2c_6_7_dis_kbd_grp",

	"i2c6_dis_sd_grp", "i2c7_dis_sd_grp", "can0_dis_nor_grp",

	"can0_dis_sd_grp", "can1_dis_sd_grp", "can1_dis_kbd_grp", "pcie0_grp",

	"pcie1_grp", "pcie2_grp", "sata0_grp", "sata1_grp", "sata2_grp",

	"ssp1_dis_kbd_grp", "ssp1_dis_sd_grp", "gpt64_grp"



For SPEAr1340 machines:

	"pads_as_gpio_grp", "fsmc_8bit_grp", "fsmc_16bit_grp", "fsmc_pnor_grp",

	"keyboard_row_col_grp", "keyboard_col5_grp", "spdif_in_grp",

	"spdif_out_grp", "gpt_0_1_grp", "pwm0_grp", "pwm1_grp", "pwm2_grp",

	"pwm3_grp", "vip_mux_grp", "vip_mux_cam0_grp", "vip_mux_cam1_grp",

	"vip_mux_cam2_grp", "vip_mux_cam3_grp", "cam0_grp", "cam1_grp",

	"cam2_grp", "cam3_grp", "smi_grp", "ssp0_grp", "ssp0_cs1_grp",

	"ssp0_cs2_grp", "ssp0_cs3_grp", "uart0_grp", "uart0_enh_grp",

	"uart1_grp", "i2s_in_grp", "i2s_out_grp", "gmii_grp", "rgmii_grp",

	"rmii_grp", "sgmii_grp", "i2c0_grp", "i2c1_grp", "cec0_grp", "cec1_grp",

	"sdhci_grp", "cf_grp", "xd_grp", "clcd_grp", "arm_trace_grp",

	"miphy_dbg_grp", "pcie_grp", "sata_grp"



Valid values for function names are:

For All SPEAr3xx machines:

	"firda", "i2c0", "ssp_cs", "ssp0", "mii0", "gpio0", "uart0_ext",
@@ -106,3 +139,17 @@ For SPEAr320 machines: 
	"uart2", "uart3", "uart4", "uart5", "uart6", "rs485", "touchscreen",

	"can0", "can1", "pwm0_1", "pwm2", "pwm3", "ssp1", "ssp2", "mii2",

	"mii0_1", "i2c1", "i2c2"





For SPEAr1310 machines:

	"i2c0", "ssp0", "i2s0", "i2s1", "clcd", "arm_gpio", "smi", "gmii",

	"rgmii", "smii_0_1_2", "ras_mii_txclk", "nand", "keyboard", "uart0",

	"gpt0", "gpt1", "sdhci", "cf", "xd", "touchscreen", "uart1", "uart2_3",

	"uart4", "uart5", "rs485_0_1_tdm_0_1", "i2c_1_2", "i2c3_i2s1",

	"i2c_4_5", "i2c_6_7", "can0", "can1", "pci", "sata", "ssp1", "gpt64"



For SPEAr1340 machines:

	"pads_as_gpio", "fsmc", "keyboard", "spdif_in", "spdif_out", "gpt_0_1",

	"pwm", "vip", "cam0", "cam1", "cam2", "cam3", "smi", "ssp0", "uart0",

	"uart1", "i2s", "gmac", "i2c0", "i2c1", "cec0", "cec1", "sdhci", "cf",

	"xd", "clcd", "arm_trace", "miphy_dbg", "pcie", "sata"

MAINTAINERS

+13 −0
Original line number Diff line number Diff line
@@ -6350,14 +6350,25 @@ F: include/linux/compiler.h 


SPEAR PLATFORM SUPPORT

M:	Viresh Kumar <viresh.kumar@st.com>

M:	Shiraz Hashim <shiraz.hashim@st.com>

L:	spear-devel@list.st.com

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

W:	http://www.st.com/spear

S:	Maintained

F:	arch/arm/plat-spear/



SPEAR13XX MACHINE SUPPORT

M:	Viresh Kumar <viresh.kumar@st.com>

M:	Shiraz Hashim <shiraz.hashim@st.com>

L:	spear-devel@list.st.com

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

W:	http://www.st.com/spear

S:	Maintained

F:	arch/arm/mach-spear13xx/



SPEAR3XX MACHINE SUPPORT

M:	Viresh Kumar <viresh.kumar@st.com>

M:	Shiraz Hashim <shiraz.hashim@st.com>

L:	spear-devel@list.st.com

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

W:	http://www.st.com/spear
@@ -6366,6 +6377,8 @@ F: arch/arm/mach-spear3xx/ 


SPEAR6XX MACHINE SUPPORT

M:	Rajeev Kumar <rajeev-dlh.kumar@st.com>

M:	Shiraz Hashim <shiraz.hashim@st.com>

M:	Viresh Kumar <viresh.kumar@st.com>

L:	spear-devel@list.st.com

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

W:	http://www.st.com/spear

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