Commit 2e368dd2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms. A bulk of this is smaller fixes
  or cleanups, but some of the new material this time around is:

   - Support for Nvidia Tegra234 SoC

   - Ring accelerator support for TI AM65x

   - PRUSS driver for TI platforms

   - Renesas support for R-Car V3U SoC

   - Reset support for Cortex-M4 processor on i.MX8MQ

  There are also new socinfo entries for a handful of different SoCs and
  platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits)
  drm/mediatek: reduce clear event
  soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
  soc: mediatek: cmdq: add jump function
  soc: mediatek: cmdq: add write_s_mask value function
  soc: mediatek: cmdq: add write_s value function
  soc: mediatek: cmdq: add read_s function
  soc: mediatek: cmdq: add write_s_mask function
  soc: mediatek: cmdq: add write_s function
  soc: mediatek: cmdq: add address shift in jump
  soc: mediatek: mtk-infracfg: Fix kerneldoc
  soc: amlogic: pm-domains: use always-on flag
  reset: sti: reset-syscfg: fix struct description warnings
  reset: imx7: add the cm4 reset for i.MX8MQ
  dt-bindings: reset: imx8mq: add m4 reset
  reset: Fix and extend kerneldoc
  reset: reset-zynqmp: Added support for Versal platform
  dt-bindings: reset: Updated binding for Versal reset driver
  reset: imx7: Support module build
  soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
  soc: fsl: qman: convert to use be32_add_cpu()
  ...
parents e731f314 9f7f2693
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+2 −1
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@@ -10,7 +10,8 @@ Required properties:
    "brcm,bcm7038-gisb-arb" for 130nm chips
- reg: specifies the base physical address and size of the registers
- interrupts: specifies the two interrupts (timeout and TEA) to be used from
  the parent interrupt controller
  the parent interrupt controller. A third optional interrupt may be specified
  for breakpoints.

Optional properties:

+2 −1
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@@ -5,7 +5,7 @@ The hardware block diagram please check bindings/iommu/mediatek,iommu.txt
Mediatek SMI have two generations of HW architecture, here is the list
which generation the SoCs use:
generation 1: mt2701 and mt7623.
generation 2: mt2712, mt6779, mt8173 and mt8183.
generation 2: mt2712, mt6779, mt8167, mt8173 and mt8183.

There's slight differences between the two SMI, for generation 2, the
register which control the iommu port is at each larb's register base. But
@@ -20,6 +20,7 @@ Required properties:
	"mediatek,mt2712-smi-common"
	"mediatek,mt6779-smi-common"
	"mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common"
	"mediatek,mt8167-smi-common"
	"mediatek,mt8173-smi-common"
	"mediatek,mt8183-smi-common"
- reg : the register and size of the SMI block.
+2 −1
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@@ -8,6 +8,7 @@ Required properties:
		"mediatek,mt2712-smi-larb"
		"mediatek,mt6779-smi-larb"
		"mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb"
		"mediatek,mt8167-smi-larb"
		"mediatek,mt8173-smi-larb"
		"mediatek,mt8183-smi-larb"
- reg : the register and size of this local arbiter.
@@ -22,7 +23,7 @@ Required properties:
  - "gals": the clock for GALS(Global Async Local Sync).
  Here is the list which has this GALS: mt8183.

Required property for mt2701, mt2712, mt6779 and mt7623:
Required property for mt2701, mt2712, mt6779, mt7623 and mt8167:
- mediatek,larb-id :the hardware id of this larb.

Example:
+21 −2
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ properties:
      - amlogic,meson8b-pwrc
      - amlogic,meson8m2-pwrc
      - amlogic,meson-gxbb-pwrc
      - amlogic,meson-axg-pwrc
      - amlogic,meson-g12a-pwrc
      - amlogic,meson-sm1-pwrc

@@ -42,11 +43,11 @@ properties:
      - const: vapb

  resets:
    minItems: 11
    minItems: 5
    maxItems: 12

  reset-names:
    minItems: 11
    minItems: 5
    maxItems: 12

  "#power-domain-cells":
@@ -107,6 +108,24 @@ allOf:
        - resets
        - reset-names

  - if:
      properties:
        compatible:
          enum:
            - amlogic,meson-axg-pwrc
    then:
      properties:
        reset-names:
          items:
            - const: viu
            - const: venc
            - const: vcbus
            - const: vencl
            - const: vid_lock
      required:
        - resets
        - reset-names

  - if:
      properties:
        compatible:
+44 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: BCM63xx power domain driver

maintainers:
  - Álvaro Fernández Rojas <noltari@gmail.com>

description: |
  BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller
  to enable/disable certain components in order to save power.

properties:
  compatible:
    items:
      - enum:
          - brcm,bcm6318-power-controller
          - brcm,bcm6328-power-controller
          - brcm,bcm6362-power-controller
          - brcm,bcm63268-power-controller

  reg:
    maxItems: 1

  "#power-domain-cells":
    const: 1

required:
  - compatible
  - reg
  - "#power-domain-cells"

additionalProperties: false

examples:
  - |
    periph_pwr: power-controller@10001848 {
        compatible = "brcm,bcm6328-power-controller";
        reg = <0x10001848 0x4>;
        #power-domain-cells = <1>;
    };
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