Commit 9f7f2693 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v5.9-next-soc' of... 

Merge tag 'v5.9-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

cmdq helper:
- add new functionality for writing and reading values to and from addresses

* tag 'v5.9-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  drm/mediatek: reduce clear event
  soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
  soc: mediatek: cmdq: add jump function
  soc: mediatek: cmdq: add write_s_mask value function
  soc: mediatek: cmdq: add write_s value function
  soc: mediatek: cmdq: add read_s function
  soc: mediatek: cmdq: add write_s_mask function
  soc: mediatek: cmdq: add write_s function
  soc: mediatek: cmdq: add address shift in jump
  soc: mediatek: mtk-infracfg: Fix kerneldoc

Link: https://lore.kernel.org/r/ac672cc9-059c-b768-3a67-1f674d4a2b7a@gmail.com


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 64de2cd3 bee1abc9

drivers/gpu/drm/mediatek/mtk_drm_crtc.c

+1 −1
Original line number Diff line number Diff line
@@ -481,7 +481,7 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc) 
		mbox_flush(mtk_crtc->cmdq_client->chan, 2000);

		cmdq_handle = cmdq_pkt_create(mtk_crtc->cmdq_client, PAGE_SIZE);

		cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);

		cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event);

		cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);

		mtk_crtc_ddp_config(crtc, cmdq_handle);

		cmdq_pkt_finalize(cmdq_handle);

		cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle);

drivers/soc/mediatek/mtk-cmdq-helper.c

+110 −3
Original line number Diff line number Diff line
@@ -13,11 +13,16 @@ 
#define CMDQ_POLL_ENABLE_MASK	BIT(0)

#define CMDQ_EOC_IRQ_EN		BIT(0)

#define CMDQ_REG_TYPE		1

#define CMDQ_JUMP_RELATIVE	1



struct cmdq_instruction {

	union {

		u32 value;

		u32 mask;

		struct {

			u16 arg_c;

			u16 src_reg;

		};

	};

	union {

		u16 offset;
@@ -223,15 +228,104 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, 
}

EXPORT_SYMBOL(cmdq_pkt_write_mask);



int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)

int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low,

		    u16 reg_idx)

{

	struct cmdq_instruction inst = {};



	inst.op = CMDQ_CODE_READ_S;

	inst.dst_t = CMDQ_REG_TYPE;

	inst.sop = high_addr_reg_idx;

	inst.reg_dst = reg_idx;

	inst.src_reg = addr_low;



	return cmdq_pkt_append_command(pkt, inst);

}

EXPORT_SYMBOL(cmdq_pkt_read_s);



int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,

		     u16 addr_low, u16 src_reg_idx)

{

	struct cmdq_instruction inst = {};



	inst.op = CMDQ_CODE_WRITE_S;

	inst.src_t = CMDQ_REG_TYPE;

	inst.sop = high_addr_reg_idx;

	inst.offset = addr_low;

	inst.src_reg = src_reg_idx;



	return cmdq_pkt_append_command(pkt, inst);

}

EXPORT_SYMBOL(cmdq_pkt_write_s);



int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,

			  u16 addr_low, u16 src_reg_idx, u32 mask)

{

	struct cmdq_instruction inst = {};

	int err;



	inst.op = CMDQ_CODE_MASK;

	inst.mask = ~mask;

	err = cmdq_pkt_append_command(pkt, inst);

	if (err < 0)

		return err;



	inst.mask = 0;

	inst.op = CMDQ_CODE_WRITE_S_MASK;

	inst.src_t = CMDQ_REG_TYPE;

	inst.sop = high_addr_reg_idx;

	inst.offset = addr_low;

	inst.src_reg = src_reg_idx;



	return cmdq_pkt_append_command(pkt, inst);

}

EXPORT_SYMBOL(cmdq_pkt_write_s_mask);



int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,

			   u16 addr_low, u32 value)

{

	struct cmdq_instruction inst = {};



	inst.op = CMDQ_CODE_WRITE_S;

	inst.sop = high_addr_reg_idx;

	inst.offset = addr_low;

	inst.value = value;



	return cmdq_pkt_append_command(pkt, inst);

}

EXPORT_SYMBOL(cmdq_pkt_write_s_value);



int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,

				u16 addr_low, u32 value, u32 mask)

{

	struct cmdq_instruction inst = {};

	int err;



	inst.op = CMDQ_CODE_MASK;

	inst.mask = ~mask;

	err = cmdq_pkt_append_command(pkt, inst);

	if (err < 0)

		return err;



	inst.op = CMDQ_CODE_WRITE_S_MASK;

	inst.sop = high_addr_reg_idx;

	inst.offset = addr_low;

	inst.value = value;



	return cmdq_pkt_append_command(pkt, inst);

}

EXPORT_SYMBOL(cmdq_pkt_write_s_mask_value);



int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear)

{

	struct cmdq_instruction inst = { {0} };

	u32 clear_option = clear ? CMDQ_WFE_UPDATE : 0;



	if (event >= CMDQ_MAX_EVENT)

		return -EINVAL;



	inst.op = CMDQ_CODE_WFE;

	inst.value = CMDQ_WFE_OPTION;

	inst.value = CMDQ_WFE_OPTION | clear_option;

	inst.event = event;



	return cmdq_pkt_append_command(pkt, inst);
@@ -315,6 +409,18 @@ int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value) 
}

EXPORT_SYMBOL(cmdq_pkt_assign);



int cmdq_pkt_jump(struct cmdq_pkt *pkt, dma_addr_t addr)

{

	struct cmdq_instruction inst = {};



	inst.op = CMDQ_CODE_JUMP;

	inst.offset = CMDQ_JUMP_RELATIVE;

	inst.value = addr >>

		cmdq_get_shift_pa(((struct cmdq_client *)pkt->cl)->chan);

	return cmdq_pkt_append_command(pkt, inst);

}

EXPORT_SYMBOL(cmdq_pkt_jump);



int cmdq_pkt_finalize(struct cmdq_pkt *pkt)

{

	struct cmdq_instruction inst = { {0} };
@@ -329,7 +435,8 @@ int cmdq_pkt_finalize(struct cmdq_pkt *pkt) 


	/* JUMP to end */

	inst.op = CMDQ_CODE_JUMP;

	inst.value = CMDQ_JUMP_PASS;

	inst.value = CMDQ_JUMP_PASS >>

		cmdq_get_shift_pa(((struct cmdq_client *)pkt->cl)->chan);

	err = cmdq_pkt_append_command(pkt, inst);



	return err;

drivers/soc/mediatek/mtk-infracfg.c

+2 −2
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 


/**

 * mtk_infracfg_set_bus_protection - enable bus protection

 * @regmap: The infracfg regmap

 * @infracfg: The infracfg regmap

 * @mask: The mask containing the protection bits to be enabled.

 * @reg_update: The boolean flag determines to set the protection bits

 *              by regmap_update_bits with enable register(PROTECTEN) or
@@ -50,7 +50,7 @@ int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, 


/**

 * mtk_infracfg_clear_bus_protection - disable bus protection

 * @regmap: The infracfg regmap

 * @infracfg: The infracfg regmap

 * @mask: The mask containing the protection bits to be disabled.

 * @reg_update: The boolean flag determines to clear the protection bits

 *              by regmap_update_bits with enable register(PROTECTEN) or

include/linux/mailbox/mtk-cmdq-mailbox.h

+4 −2
Original line number Diff line number Diff line
@@ -28,8 +28,7 @@ 
 * bit 16-27: update value

 * bit 31: 1 - update, 0 - no update

 */

#define CMDQ_WFE_OPTION			(CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | \

					CMDQ_WFE_WAIT_VALUE)

#define CMDQ_WFE_OPTION			(CMDQ_WFE_WAIT | CMDQ_WFE_WAIT_VALUE)



/** cmdq event maximum */

#define CMDQ_MAX_EVENT			0x3ff
@@ -60,6 +59,9 @@ enum cmdq_code { 
	CMDQ_CODE_JUMP = 0x10,

	CMDQ_CODE_WFE = 0x20,

	CMDQ_CODE_EOC = 0x40,

	CMDQ_CODE_READ_S = 0x80,

	CMDQ_CODE_WRITE_S = 0x90,

	CMDQ_CODE_WRITE_S_MASK = 0x91,

	CMDQ_CODE_LOGIC = 0xa0,

};

include/linux/soc/mediatek/mtk-cmdq.h

+91 −2
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ 
#include <linux/timer.h>



#define CMDQ_NO_TIMEOUT		0xffffffffu

#define CMDQ_ADDR_HIGH(addr)	((u32)(((addr) >> 16) & GENMASK(31, 0)))

#define CMDQ_ADDR_LOW(addr)	((u16)(addr) | BIT(1))



struct cmdq_pkt;
@@ -102,14 +104,90 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); 
int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,

			u16 offset, u32 value, u32 mask);



/*

 * cmdq_pkt_read_s() - append read_s command to the CMDQ packet

 * @pkt:	the CMDQ packet

 * @high_addr_reg_idx:	internal register ID which contains high address of pa

 * @addr_low:	low address of pa

 * @reg_idx:	the CMDQ internal register ID to cache read data

 *

 * Return: 0 for success; else the error code is returned

 */

int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low,

		    u16 reg_idx);



/**

 * cmdq_pkt_write_s() - append write_s command to the CMDQ packet

 * @pkt:	the CMDQ packet

 * @high_addr_reg_idx:	internal register ID which contains high address of pa

 * @addr_low:	low address of pa

 * @src_reg_idx:	the CMDQ internal register ID which cache source value

 *

 * Return: 0 for success; else the error code is returned

 *

 * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH()

 * to get high address and call cmdq_pkt_assign() to assign value into internal

 * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when

 * call to this function.

 */

int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,

		     u16 addr_low, u16 src_reg_idx);



/**

 * cmdq_pkt_write_s_mask() - append write_s with mask command to the CMDQ packet

 * @pkt:	the CMDQ packet

 * @high_addr_reg_idx:	internal register ID which contains high address of pa

 * @addr_low:	low address of pa

 * @src_reg_idx:	the CMDQ internal register ID which cache source value

 * @mask:	the specified target address mask, use U32_MAX if no need

 *

 * Return: 0 for success; else the error code is returned

 *

 * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH()

 * to get high address and call cmdq_pkt_assign() to assign value into internal

 * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when

 * call to this function.

 */

int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,

			  u16 addr_low, u16 src_reg_idx, u32 mask);



/**

 * cmdq_pkt_write_s_value() - append write_s command to the CMDQ packet which

 *			      write value to a physical address

 * @pkt:	the CMDQ packet

 * @high_addr_reg_idx:	internal register ID which contains high address of pa

 * @addr_low:	low address of pa

 * @value:	the specified target value

 *

 * Return: 0 for success; else the error code is returned

 */

int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,

			   u16 addr_low, u32 value);



/**

 * cmdq_pkt_write_s_mask_value() - append write_s command with mask to the CMDQ

 *				   packet which write value to a physical

 *				   address

 * @pkt:	the CMDQ packet

 * @high_addr_reg_idx:	internal register ID which contains high address of pa

 * @addr_low:	low address of pa

 * @value:	the specified target value

 * @mask:	the specified target mask

 *

 * Return: 0 for success; else the error code is returned

 */

int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx,

				u16 addr_low, u32 value, u32 mask);



/**

 * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet

 * @pkt:	the CMDQ packet

 * @event:	the desired event type to "wait and CLEAR"

 * @event:	the desired event type to wait

 * @clear:	clear event or not after event arrive

 *

 * Return: 0 for success; else the error code is returned

 */

int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event);

int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear);



/**

 * cmdq_pkt_clear_event() - append clear event command to the CMDQ packet
@@ -175,6 +253,17 @@ int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, 
 */

int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value);



/**

 * cmdq_pkt_jump() - Append jump command to the CMDQ packet, ask GCE

 *		     to execute an instruction that change current thread PC to

 *		     a physical address which should contains more instruction.

 * @pkt:        the CMDQ packet

 * @addr:       physical address of target instruction buffer

 *

 * Return: 0 for success; else the error code is returned

 */

int cmdq_pkt_jump(struct cmdq_pkt *pkt, dma_addr_t addr);



/**

 * cmdq_pkt_finalize() - Append EOC and jump command to pkt.

 * @pkt:	the CMDQ packet

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