Commit 2abeb52e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'samsung-dt-5.2-2' of... 

Merge tag 'samsung-dt-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.2, second round

1. DTC warning fixes: move timer and pmu nodes outside of soc node,
2. Properly override MDMA0 on Universal C210,
3. Fix camera clock provider (to match bindings and driver) on Goni.

* tag 'samsung-dt-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux

:
  ARM: dts: s5pv210: Fix camera clock provider on Goni board
  ARM: dts: exynos: Properly override node to use MDMA0 on Universal C210
  ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250
  ARM: dts: exynos: Remove unneeded address/size cells from fixed-clock on Exynos3250
  ARM: dts: exynos: Move pmu and timer nodes out of soc

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 44b9c8e7 b4bcbdee

arch/arm/boot/dts/exynos3250.dtsi

+35 −37
Original line number Diff line number Diff line
@@ -97,20 +97,12 @@ 
		};

	};



	soc: soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



	fixed-rate-clocks {

		#address-cells = <1>;

		#size-cells = <0>;



		xusbxti: clock@0 {

			compatible = "fixed-clock";

				#address-cells = <1>;

				#size-cells = <0>;

			reg = <0>;

			clock-frequency = <0>;

			#clock-cells = <0>;
@@ -134,6 +126,18 @@ 
		};

	};



	pmu {

		compatible = "arm,cortex-a7-pmu";

		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;

	};



	soc: soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		sysram@2020000 {

			compatible = "mmio-sram";

			reg = <0x02020000 0x40000>;
@@ -673,12 +677,6 @@ 
			status = "disabled";

		};



		pmu {

			compatible = "arm,cortex-a7-pmu";

			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;

		};



		ppmu_dmc0: ppmu_dmc0@106a0000 {

			compatible = "samsung,exynos-ppmu";

			reg = <0x106a0000 0x2000>;

arch/arm/boot/dts/exynos4.dtsi

+7 −7
Original line number Diff line number Diff line
@@ -51,6 +51,12 @@ 
		serial3 = &serial_3;

	};



	pmu: pmu {

		compatible = "arm,cortex-a9-pmu";

		interrupt-parent = <&combiner>;

		interrupts = <2 2>, <3 2>;

	};



	soc: soc {

		compatible = "simple-bus";

		#address-cells = <1>;
@@ -169,12 +175,6 @@ 
			reg = <0x10440000 0x1000>;

		};



		pmu: pmu {

			compatible = "arm,cortex-a9-pmu";

			interrupt-parent = <&combiner>;

			interrupts = <2 2>, <3 2>;

		};



		sys_reg: syscon@10010000 {

			compatible = "samsung,exynos4-sysreg", "syscon";

			reg = <0x10010000 0x400>;
@@ -675,7 +675,7 @@ 
			status = "disabled";

		};



		amba {

		amba: amba {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "simple-bus";

arch/arm/boot/dts/exynos4210-universal_c210.dts

+16 −1
Original line number Diff line number Diff line
@@ -177,6 +177,20 @@ 
	};

};



&amba {

	mdma0: mdma@12840000 {

		compatible = "arm,pl330", "arm,primecell";

		reg = <0x12840000 0x1000>;

		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&clock CLK_MDMA>;

		clock-names = "apb_pclk";

		#dma-cells = <1>;

		#dma-channels = <8>;

		#dma-requests = <1>;

		power-domains = <&pd_lcd0>;

	};

};



&camera {

	status = "okay";
@@ -491,7 +505,8 @@ 
};



&mdma1 {

	reg = <0x12840000 0x1000>;

	/* Use the secure mdma0 */

	status = "disabled";

};



&mixer {

arch/arm/boot/dts/exynos5250.dtsi

+20 −20
Original line number Diff line number Diff line
@@ -157,6 +157,12 @@ 
		};

	};



	pmu {

		compatible = "arm,cortex-a15-pmu";

		interrupt-parent = <&combiner>;

		interrupts = <1 2>, <22 4>;

	};



	soc: soc {

		sysram@2020000 {

			compatible = "mmio-sram";
@@ -227,20 +233,6 @@ 
			power-domains = <&pd_mau>;

		};



		timer {

			compatible = "arm,armv7-timer";

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

			/*

			 * Unfortunately we need this since some versions

			 * of U-Boot on Exynos don't set the CNTFRQ register,

			 * so we need the value from DT.

			 */

			clock-frequency = <24000000>;

		};



		mct@101c0000 {

			compatible = "samsung,exynos4210-mct";

			reg = <0x101C0000 0x800>;
@@ -265,12 +257,6 @@ 
			};

		};



		pmu {

			compatible = "arm,cortex-a15-pmu";

			interrupt-parent = <&combiner>;

			interrupts = <1 2>, <22 4>;

		};



		pinctrl_0: pinctrl@11400000 {

			compatible = "samsung,exynos5250-pinctrl";

			reg = <0x11400000 0x1000>;
@@ -1097,6 +1083,20 @@ 
		       };

		};

	};



	timer {

		compatible = "arm,armv7-timer";

		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

		/*

		 * Unfortunately we need this since some versions

		 * of U-Boot on Exynos don't set the CNTFRQ register,

		 * so we need the value from DT.

		 */

		clock-frequency = <24000000>;

	};

};



&dp {

arch/arm/boot/dts/exynos54xx.dtsi

+19 −19
Original line number Diff line number Diff line
@@ -25,7 +25,6 @@ 
		usbdrdphy1 = &usbdrd_phy1;

	};



	soc: soc {

	arm_a7_pmu: arm-a7-pmu {

		compatible = "arm,cortex-a7-pmu";

		interrupt-parent = <&gic>;
@@ -46,6 +45,7 @@ 
		status = "disabled";

	};



	soc: soc {

		sysram@2020000 {

			compatible = "mmio-sram";

			reg = <0x02020000 0x54000>;

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