Commit 25880899 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v5.7-next-dts32' of... 

Merge tag 'v5.7-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

MT2701:
- add MUSB device to the SoC and the EVB

MT7623:
- add Mali-450 device node and bindings
- add phy to gmac2

* tag 'v5.7-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  arm: dts: mt2701: Add usb2 device nodes
  dt-bindings: gpu: mali-utgard: add mediatek, mt7623-mali compatible
  arm: dts: mt7623: add Mali-450 device node
  arm: dts: mt7623: add phy-mode property for gmac2

Link: https://lore.kernel.org/r/ec17cf62-5463-9537-6618-2db9b2b5036e@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents e9f981c7 189881af

Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml

+2 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ properties: 
              - amlogic,meson-gxbb-mali

              - amlogic,meson-gxl-mali

              - hisilicon,hi6220-mali

              - mediatek,mt7623-mali

              - rockchip,rk3328-mali

          - const: arm,mali-450
@@ -130,6 +131,7 @@ allOf: 
              - amlogic,meson8-mali

              - amlogic,meson8b-mali

              - hisilicon,hi6220-mali

              - mediatek,mt7623-mali

              - rockchip,rk3036-mali

              - rockchip,rk3066-mali

              - rockchip,rk3188-mali

arch/arm/boot/dts/mt2701-evb.dts

+21 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
 */



/dts-v1/;

#include <dt-bindings/gpio/gpio.h>

#include "mt2701.dtsi"



/ {
@@ -61,6 +62,15 @@ 
		>;

		default-brightness-level = <9>;

	};



	usb_vbus: regulator@0 {

		compatible = "regulator-fixed";

		regulator-name = "usb_vbus";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

		gpio = <&pio 45 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};

};



&auxadc {
@@ -230,3 +240,14 @@ 
&uart0 {

	status = "okay";

};



&usb2 {

	status = "okay";

	usb-role-switch;

	connector{

		compatible = "gpio-usb-b-connector", "usb-b-connector";

		type = "micro";

		id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;

		vbus-supply = <&usb_vbus>;

	};

};

arch/arm/boot/dts/mt2701.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -671,6 +671,39 @@ 
		};

	};



	usb2: usb@11200000 {

		compatible = "mediatek,mt2701-musb",

			     "mediatek,mtk-musb";

		reg = <0 0x11200000 0 0x1000>;

		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;

		interrupt-names = "mc";

		phys = <&u2port2 PHY_TYPE_USB2>;

		dr_mode = "otg";

		clocks = <&pericfg CLK_PERI_USB0>,

			 <&pericfg CLK_PERI_USB0_MCU>,

			 <&pericfg CLK_PERI_USB_SLV>;

		clock-names = "main","mcu","univpll";

		power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;

		status = "disabled";

	};



	u2phy0: usb-phy@11210000 {

		compatible = "mediatek,generic-tphy-v1";

		reg = <0 0x11210000 0 0x0800>;

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;

		status = "okay";



		u2port2: usb-phy@1a1c4800 {

			reg = <0 0x11210800 0 0x0100>;

			clocks = <&topckgen CLK_TOP_USB_PHY48M>;

			clock-names = "ref";

			#phy-cells = <1>;

			status = "okay";

		};

	};



	ethsys: syscon@1b000000 {

		compatible = "mediatek,mt2701-ethsys", "syscon";

		reg = <0 0x1b000000 0 0x1000>;

arch/arm/boot/dts/mt7623.dtsi

+25 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * Copyright (c) 2017-2018 MediaTek Inc.

 * Author: John Crispin <john@phrozen.org>

 *	   Sean Wang <sean.wang@mediatek.com>

 *	   Ryder Lee <ryder.lee@mediatek.com>

 *

 */
@@ -733,6 +734,30 @@ 
		#reset-cells = <1>;

	};



	mali: gpu@13040000 {

		compatible = "mediatek,mt7623-mali", "arm,mali-450";

		reg = <0 0x13040000 0 0x30000>;

		interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>;

		interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",

				  "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3",

				  "pp";

		clocks = <&topckgen CLK_TOP_MMPLL>,

			 <&g3dsys CLK_G3DSYS_CORE>;

		clock-names = "bus", "core";

		power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>;

		resets = <&g3dsys MT2701_G3DSYS_CORE_RST>;

	};



	mmsys: syscon@14000000 {

		compatible = "mediatek,mt7623-mmsys",

			     "mediatek,mt2701-mmsys",

arch/arm/boot/dts/mt7623n-rfb-emmc.dts

+1 −0
Original line number Diff line number Diff line
@@ -138,6 +138,7 @@ 
	mac@1 {

		compatible = "mediatek,eth-mac";

		reg = <1>;

		phy-mode = "rgmii";

		phy-handle = <&phy5>;

	};

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