Commit 189881af authored by Min Guo's avatar Min Guo Committed by Matthias Brugger
Browse files

arm: dts: mt2701: Add usb2 device nodes



Add musb nodes and usb2 phy nodes for MT2701

Signed-off-by: default avatarMin Guo <min.guo@mediatek.com>
Link: https://lore.kernel.org/r/20191211015446.11477-3-min.guo@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 795240b5
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+21 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "mt2701.dtsi"

/ {
@@ -61,6 +62,15 @@
		>;
		default-brightness-level = <9>;
	};

	usb_vbus: regulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "usb_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&pio 45 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&auxadc {
@@ -230,3 +240,14 @@
&uart0 {
	status = "okay";
};

&usb2 {
	status = "okay";
	usb-role-switch;
	connector{
		compatible = "gpio-usb-b-connector", "usb-b-connector";
		type = "micro";
		id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
		vbus-supply = <&usb_vbus>;
	};
};
+33 −0
Original line number Diff line number Diff line
@@ -671,6 +671,39 @@
		};
	};

	usb2: usb@11200000 {
		compatible = "mediatek,mt2701-musb",
			     "mediatek,mtk-musb";
		reg = <0 0x11200000 0 0x1000>;
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
		interrupt-names = "mc";
		phys = <&u2port2 PHY_TYPE_USB2>;
		dr_mode = "otg";
		clocks = <&pericfg CLK_PERI_USB0>,
			 <&pericfg CLK_PERI_USB0_MCU>,
			 <&pericfg CLK_PERI_USB_SLV>;
		clock-names = "main","mcu","univpll";
		power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
		status = "disabled";
	};

	u2phy0: usb-phy@11210000 {
		compatible = "mediatek,generic-tphy-v1";
		reg = <0 0x11210000 0 0x0800>;
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		status = "okay";

		u2port2: usb-phy@1a1c4800 {
			reg = <0 0x11210800 0 0x0100>;
			clocks = <&topckgen CLK_TOP_USB_PHY48M>;
			clock-names = "ref";
			#phy-cells = <1>;
			status = "okay";
		};
	};

	ethsys: syscon@1b000000 {
		compatible = "mediatek,mt2701-ethsys", "syscon";
		reg = <0 0x1b000000 0 0x1000>;