Commit 23e500e8 authored by Nikita Danilov's avatar Nikita Danilov Committed by David S. Miller
Browse files

net: atlantic: disable PTP on AQC111, AQC112 



This patch disables PTP on AQC111 and AQC112 due to a known HW issue,
which can cause datapath issues.

Ideally PTP block should have been disabled via PHY provisioning, but
unfortunately many units have been shipped with enabled PTP block.
Thus, we have to work around this in the driver.

Fixes: dbcd6806 ("net: aquantia: add support for Phy access")
Signed-off-by: default avatarNikita Danilov <ndanilov@marvell.com>
Signed-off-by: default avatarMark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: default avatarIgor Russkikh <irusskikh@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0b4a66a3

drivers/net/ethernet/aquantia/atlantic/aq_hw.h

+1 −0
Original line number Diff line number Diff line
@@ -64,6 +64,7 @@ struct aq_hw_caps_s { 
	u8 rx_rings;

	bool flow_control;

	bool is_64_dma;

	u32 quirks;

	u32 priv_data_len;

};

drivers/net/ethernet/aquantia/atlantic/aq_nic.c

+9 −0
Original line number Diff line number Diff line
@@ -415,6 +415,15 @@ int aq_nic_init(struct aq_nic_s *self) 
	    self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {

		self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;

		err = aq_phy_init(self->aq_hw);



		/* Disable the PTP on NICs where it's known to cause datapath

		 * problems.

		 * Ideally this should have been done by PHY provisioning, but

		 * many units have been shipped with enabled PTP block already.

		 */

		if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP)

			if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX)

				aq_phy_disable_ptp(self->aq_hw);

	}



	for (i = 0U; i < self->aq_vecs; i++) {

drivers/net/ethernet/aquantia/atlantic/aq_nic.h

+2 −0
Original line number Diff line number Diff line
@@ -81,6 +81,8 @@ struct aq_nic_cfg_s { 
#define AQ_NIC_FLAG_ERR_UNPLUG  0x40000000U

#define AQ_NIC_FLAG_ERR_HW      0x80000000U



#define AQ_NIC_QUIRK_BAD_PTP    BIT(0)



#define AQ_NIC_WOL_MODES        (WAKE_MAGIC |\

				 WAKE_PHY)

drivers/net/ethernet/aquantia/atlantic/aq_phy.c

+27 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/* aQuantia Corporation Network Driver

 * Copyright (C) 2018-2019 aQuantia Corporation. All rights reserved

/* Atlantic Network Driver

 *

 * Copyright (C) 2018-2019 aQuantia Corporation

 * Copyright (C) 2019-2020 Marvell International Ltd.

 */



#include "aq_phy.h"



#define HW_ATL_PTP_DISABLE_MSK	BIT(10)



bool aq_mdio_busy_wait(struct aq_hw_s *aq_hw)

{

	int err = 0;
@@ -145,3 +149,24 @@ bool aq_phy_init(struct aq_hw_s *aq_hw) 


	return true;

}



void aq_phy_disable_ptp(struct aq_hw_s *aq_hw)

{

	static const u16 ptp_registers[] = {

		0x031e,

		0x031d,

		0x031c,

		0x031b,

	};

	u16 val;

	int i;



	for (i = 0; i < ARRAY_SIZE(ptp_registers); i++) {

		val = aq_phy_read_reg(aq_hw, MDIO_MMD_VEND1,

				      ptp_registers[i]);



		aq_phy_write_reg(aq_hw, MDIO_MMD_VEND1,

				 ptp_registers[i],

				 val & ~HW_ATL_PTP_DISABLE_MSK);

	}

}

drivers/net/ethernet/aquantia/atlantic/aq_phy.h

+6 −2
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/* aQuantia Corporation Network Driver

 * Copyright (C) 2018-2019 aQuantia Corporation. All rights reserved

/* Atlantic Network Driver

 *

 * Copyright (C) 2018-2019 aQuantia Corporation

 * Copyright (C) 2019-2020 Marvell International Ltd.

 */



#ifndef AQ_PHY_H
@@ -29,4 +31,6 @@ bool aq_phy_init_phy_id(struct aq_hw_s *aq_hw); 


bool aq_phy_init(struct aq_hw_s *aq_hw);



void aq_phy_disable_ptp(struct aq_hw_s *aq_hw);



#endif /* AQ_PHY_H */

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