Commit 1e0566fd authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

Merge tag 'v5.2-rc2' into patchwork 

Merge back from upstream into media tree, as there are some
patches merged upstream that has pontential of causing
conflicts (one actually rised a conflict already).

Linux 5.2-rc2

* tag 'v5.2-rc2': (377 commits)
  Linux 5.2-rc2
  random: fix soft lockup when trying to read from an uninitialized blocking pool
  tracing: Silence GCC 9 array bounds warning
  ext4: fix dcache lookup of !casefolded directories
  locking/lock_events: Use this_cpu_add() when necessary
  KVM: x86: fix return value for reserved EFER
  tools/kvm_stat: fix fields filter for child events
  KVM: selftests: Wrap vcpu_nested_state_get/set functions with x86 guard
  kvm: selftests: aarch64: compile with warnings on
  kvm: selftests: aarch64: fix default vm mode
  kvm: selftests: aarch64: dirty_log_test: fix unaligned memslot size
  KVM: s390: fix memory slot handling for KVM_SET_USER_MEMORY_REGION
  KVM: x86/pmu: do not mask the value that is written to fixed PMUs
  KVM: x86/pmu: mask the result of rdpmc according to the width of the counters
  x86/kvm/pmu: Set AMD's virt PMU version to 1
  KVM: x86: do not spam dmesg with VMCS/VMCB dumps
  kvm: Check irqchip mode before assign irqfd
  kvm: svm/avic: fix off-by-one in checking host APIC ID
  KVM: selftests: do not blindly clobber registers in guest asm
  KVM: selftests: Remove duplicated TEST_ASSERT in hyperv_cpuid.c
  ...
parents 2c41cc0b cd6c84d8

Documentation/arm64/silicon-errata.txt

+5 −4
Original line number Diff line number Diff line
@@ -58,13 +58,14 @@ stable kernels. 
| ARM            | Cortex-A72      | #853709         | N/A                         |

| ARM            | Cortex-A73      | #858921         | ARM64_ERRATUM_858921        |

| ARM            | Cortex-A55      | #1024718        | ARM64_ERRATUM_1024718       |

| ARM            | Cortex-A76      | #1188873        | ARM64_ERRATUM_1188873       |

| ARM            | Cortex-A76      | #1188873,1418040| ARM64_ERRATUM_1418040       |

| ARM            | Cortex-A76      | #1165522        | ARM64_ERRATUM_1165522       |

| ARM            | Cortex-A76      | #1286807        | ARM64_ERRATUM_1286807       |

| ARM            | Neoverse-N1     | #1188873        | ARM64_ERRATUM_1188873       |

| ARM            | MMU-500         | #841119,#826419 | N/A                         |

| ARM            | Cortex-A76      | #1463225        | ARM64_ERRATUM_1463225       |

| ARM            | Neoverse-N1     | #1188873,1418040| ARM64_ERRATUM_1418040       |

| ARM            | MMU-500         | #841119,826419  | N/A                         |

|                |                 |                 |                             |

| Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375        |

| Cavium         | ThunderX ITS    | #22375,24313    | CAVIUM_ERRATUM_22375        |

| Cavium         | ThunderX ITS    | #23144          | CAVIUM_ERRATUM_23144        |

| Cavium         | ThunderX GICv3  | #23154          | CAVIUM_ERRATUM_23154        |

| Cavium         | ThunderX Core   | #27456          | CAVIUM_ERRATUM_27456        |

Documentation/bpf/btf.rst

+1 −1
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ The following sections detail encoding of each kind. 
``btf_type`` is followed by a ``u32`` with the following bits arrangement::



  #define BTF_INT_ENCODING(VAL)   (((VAL) & 0x0f000000) >> 24)

  #define BTF_INT_OFFSET(VAL)     (((VAL  & 0x00ff0000)) >> 16)

  #define BTF_INT_OFFSET(VAL)     (((VAL) & 0x00ff0000) >> 16)

  #define BTF_INT_BITS(VAL)       ((VAL)  & 0x000000ff)



The ``BTF_INT_ENCODING`` has the following attributes::

Documentation/devicetree/bindings/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ DT_MK_SCHEMA ?= dt-mk-schema 
DT_MK_SCHEMA_FLAGS := $(if $(DT_SCHEMA_FILES), -u)



quiet_cmd_chk_binding = CHKDT   $(patsubst $(srctree)/%,%,$<)

      cmd_chk_binding = $(DT_DOC_CHECKER) $< ; \

      cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \

                        $(DT_EXTRACT_EX) $< > $@



$(obj)/%.example.dts: $(src)/%.yaml FORCE

Documentation/devicetree/bindings/arm/arm-boards

+2 −2
Original line number Diff line number Diff line
@@ -216,7 +216,7 @@ Example: 
		#size-cells = <0>;



		A57_0: cpu@0 {

			compatible = "arm,cortex-a57","arm,armv8";

			compatible = "arm,cortex-a57";

			reg = <0x0 0x0>;

			device_type = "cpu";

			enable-method = "psci";
@@ -225,7 +225,7 @@ Example: 
		.....



		A53_0: cpu@100 {

			compatible = "arm,cortex-a53","arm,armv8";

			compatible = "arm,cortex-a53";

			reg = <0x0 0x100>;

			device_type = "cpu";

			enable-method = "psci";

Documentation/devicetree/bindings/arm/cpu-capacity.txt

+6 −6
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@ cpus { 
	};



	A57_0: cpu@0 {

		compatible = "arm,cortex-a57","arm,armv8";

		compatible = "arm,cortex-a57";

		reg = <0x0 0x0>;

		device_type = "cpu";

		enable-method = "psci";
@@ -129,7 +129,7 @@ cpus { 
	};



	A57_1: cpu@1 {

		compatible = "arm,cortex-a57","arm,armv8";

		compatible = "arm,cortex-a57";

		reg = <0x0 0x1>;

		device_type = "cpu";

		enable-method = "psci";
@@ -140,7 +140,7 @@ cpus { 
	};



	A53_0: cpu@100 {

		compatible = "arm,cortex-a53","arm,armv8";

		compatible = "arm,cortex-a53";

		reg = <0x0 0x100>;

		device_type = "cpu";

		enable-method = "psci";
@@ -151,7 +151,7 @@ cpus { 
	};



	A53_1: cpu@101 {

		compatible = "arm,cortex-a53","arm,armv8";

		compatible = "arm,cortex-a53";

		reg = <0x0 0x101>;

		device_type = "cpu";

		enable-method = "psci";
@@ -162,7 +162,7 @@ cpus { 
	};



	A53_2: cpu@102 {

		compatible = "arm,cortex-a53","arm,armv8";

		compatible = "arm,cortex-a53";

		reg = <0x0 0x102>;

		device_type = "cpu";

		enable-method = "psci";
@@ -173,7 +173,7 @@ cpus { 
	};



	A53_3: cpu@103 {

		compatible = "arm,cortex-a53","arm,armv8";

		compatible = "arm,cortex-a53";

		reg = <0x0 0x103>;

		device_type = "cpu";

		enable-method = "psci";

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