Commit 1c195e90 authored by Huang Shijie's avatar Huang Shijie Committed by Brian Norris
Browse files

mtd: nand: add the "bits per cell" info for legacy ID NAND 



The legacy ID NAND are all SLC.
This patch sets 1 to the @bits_per_cell for the legacy ID NAND,
which means they are all SLC.

Signed-off-by: default avatarHuang Shijie <b32955@freescale.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 7db906b7

drivers/mtd/nand/nand_base.c

+3 −0
Original line number Diff line number Diff line
@@ -3238,6 +3238,9 @@ static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, 
	mtd->oobsize = mtd->writesize / 32;

	*busw = type->options & NAND_BUSWIDTH_16;



	/* All legacy ID NAND are small-page, SLC */

	chip->bits_per_cell = 1;



	/*

	 * Check for Spansion/AMD ID + repeating 5th, 6th byte since

	 * some Spansion chips have erasesize that conflicts with size

CRA Git | Maintained and supported by SUSTech CRA and CCSE