Commit 1c15f655 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-soc-4.20' of... 

Merge tag 'imx-soc-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

i.MX SoC update for 4.20:
 - Add ipg clock support in MMDC driver for registers access, so that
   we will be safe even if the clock is not turned on by firmware.
 - Register pm_power_off handler to provide power off support for iMX6
   based boards with external PMIC.
 - Add platform code support for i.MX 6ULZ SoC which is a derivative of
   i.MX6ULL with some modules removed.

* tag 'imx-soc-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  ARM: imx: add i.mx6ulz msl support
  ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set
  ARM: imx: add mmdc ipg clock operation for mmdc

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 16a15480 c90dec00

arch/arm/mach-imx/anatop.c

+20 −0
Original line number Diff line number Diff line
@@ -31,6 +31,8 @@ 
#define ANADIG_DIGPROG_IMX6SL	0x280

#define ANADIG_DIGPROG_IMX7D	0x800



#define SRC_SBMR2		0x1c



#define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG	0x40000

#define BM_ANADIG_REG_2P5_ENABLE_PULLDOWN	0x8

#define BM_ANADIG_REG_CORE_FET_ODRIVE		0x20000000
@@ -148,6 +150,24 @@ void __init imx_init_revision_from_anatop(void) 
		major_part = (digprog >> 8) & 0xf;

		minor_part = digprog & 0xf;

		revision = ((major_part + 1) << 4) | minor_part;



		if ((digprog >> 16) == MXC_CPU_IMX6ULL) {

			void __iomem *src_base;

			u32 sbmr2;



			np = of_find_compatible_node(NULL, NULL,

						     "fsl,imx6ul-src");

			src_base = of_iomap(np, 0);

			WARN_ON(!src_base);

			sbmr2 = readl_relaxed(src_base + SRC_SBMR2);

			iounmap(src_base);



			/* src_sbmr2 bit 6 is to identify if it is i.MX6ULZ */

			if (sbmr2 & (1 << 6)) {

				digprog &= ~(0xff << 16);

				digprog |= (MXC_CPU_IMX6ULZ << 16);

			}

		}

	}



	mxc_set_cpu_type(digprog >> 16 & 0xff);

arch/arm/mach-imx/cpu.c

+3 −0
Original line number Diff line number Diff line
@@ -136,6 +136,9 @@ struct device * __init imx_soc_device_init(void) 
	case MXC_CPU_IMX6ULL:

		soc_id = "i.MX6ULL";

		break;

	case MXC_CPU_IMX6ULZ:

		soc_id = "i.MX6ULZ";

		break;

	case MXC_CPU_IMX6SLL:

		soc_id = "i.MX6SLL";

		break;

arch/arm/mach-imx/mmdc.c

+14 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
 * http://www.gnu.org/copyleft/gpl.html

 */



#include <linux/clk.h>

#include <linux/hrtimer.h>

#include <linux/init.h>

#include <linux/interrupt.h>
@@ -546,7 +547,20 @@ static int imx_mmdc_probe(struct platform_device *pdev) 
{

	struct device_node *np = pdev->dev.of_node;

	void __iomem *mmdc_base, *reg;

	struct clk *mmdc_ipg_clk;

	u32 val;

	int err;



	/* the ipg clock is optional */

	mmdc_ipg_clk = devm_clk_get(&pdev->dev, NULL);

	if (IS_ERR(mmdc_ipg_clk))

		mmdc_ipg_clk = NULL;



	err = clk_prepare_enable(mmdc_ipg_clk);

	if (err) {

		dev_err(&pdev->dev, "Unable to enable mmdc ipg clock.\n");

		return err;

	}



	mmdc_base = of_iomap(np, 0);

	WARN_ON(!mmdc_base);

arch/arm/mach-imx/mxc.h

+7 −0
Original line number Diff line number Diff line
@@ -40,6 +40,8 @@ 
#define MXC_CPU_IMX6Q		0x63

#define MXC_CPU_IMX6UL		0x64

#define MXC_CPU_IMX6ULL		0x65

/* virtual cpu id for i.mx6ulz */

#define MXC_CPU_IMX6ULZ		0x6b

#define MXC_CPU_IMX6SLL		0x67

#define MXC_CPU_IMX7D		0x72
@@ -80,6 +82,11 @@ static inline bool cpu_is_imx6ull(void) 
	return __mxc_cpu_type == MXC_CPU_IMX6ULL;

}



static inline bool cpu_is_imx6ulz(void)

{

	return __mxc_cpu_type == MXC_CPU_IMX6ULZ;

}



static inline bool cpu_is_imx6sll(void)

{

	return __mxc_cpu_type == MXC_CPU_IMX6SLL;

arch/arm/mach-imx/pm-imx6.c

+27 −2
Original line number Diff line number Diff line
@@ -313,7 +313,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode) 
		if (cpu_is_imx6sl())

			val |= BM_CLPCR_BYPASS_PMIC_READY;

		if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() ||

		    cpu_is_imx6ull() || cpu_is_imx6sll())

		    cpu_is_imx6ull() || cpu_is_imx6sll() || cpu_is_imx6ulz())

			val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;

		else

			val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
@@ -331,7 +331,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode) 
		if (cpu_is_imx6sl() || cpu_is_imx6sx())

			val |= BM_CLPCR_BYPASS_PMIC_READY;

		if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() ||

		    cpu_is_imx6ull() || cpu_is_imx6sll())

		    cpu_is_imx6ull() || cpu_is_imx6sll() || cpu_is_imx6ulz())

			val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;

		else

			val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
@@ -618,6 +618,28 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata 
				   IMX6Q_GPR1_GINT);

}



static void imx6_pm_stby_poweroff(void)

{

	imx6_set_lpm(STOP_POWER_OFF);

	imx6q_suspend_finish(0);



	mdelay(1000);



	pr_emerg("Unable to poweroff system\n");

}



static int imx6_pm_stby_poweroff_probe(void)

{

	if (pm_power_off) {

		pr_warn("%s: pm_power_off already claimed  %p %pf!\n",

			__func__, pm_power_off, pm_power_off);

		return -EBUSY;

	}



	pm_power_off = imx6_pm_stby_poweroff;

	return 0;

}



void __init imx6_pm_ccm_init(const char *ccm_compat)

{

	struct device_node *np;
@@ -634,6 +656,9 @@ void __init imx6_pm_ccm_init(const char *ccm_compat) 
	val = readl_relaxed(ccm_base + CLPCR);

	val &= ~BM_CLPCR_LPM;

	writel_relaxed(val, ccm_base + CLPCR);



	if (of_property_read_bool(np, "fsl,pmic-stby-poweroff"))

		imx6_pm_stby_poweroff_probe();

}



void __init imx6q_pm_init(void)

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