Commit 1ade26b6 authored by Sreekanth Reddy's avatar Sreekanth Reddy Committed by Martin K. Petersen
Browse files

scsi: mpt3sas: Update MPI Headers to v02.00.57 

Update MPI Headers to version 02.00.57.

Link: https://lore.kernel.org/r/20191226111333.26131-2-sreekanth.reddy@broadcom.com


Signed-off-by: default avatarSreekanth Reddy <sreekanth.reddy@broadcom.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 5d74e18e

drivers/scsi/mpt3sas/mpi/mpi2.h

+5 −1
Original line number Diff line number Diff line
@@ -122,6 +122,9 @@ 
 * 08-28-18  02.00.53  Bumped MPI2_HEADER_VERSION_UNIT.

 *                     Added MPI2_IOCSTATUS_FAILURE

 * 12-17-18  02.00.54  Bumped MPI2_HEADER_VERSION_UNIT

 * 06-24-19  02.00.55  Bumped MPI2_HEADER_VERSION_UNIT

 * 08-01-19  02.00.56  Bumped MPI2_HEADER_VERSION_UNIT

 * 10-02-19  02.00.57  Bumped MPI2_HEADER_VERSION_UNIT

 *  --------------------------------------------------------------------------

 */
@@ -162,7 +165,7 @@ 




/* Unit and Dev versioning for this MPI header set */

#define MPI2_HEADER_VERSION_UNIT            (0x36)

#define MPI2_HEADER_VERSION_UNIT            (0x39)

#define MPI2_HEADER_VERSION_DEV             (0x00)

#define MPI2_HEADER_VERSION_UNIT_MASK       (0xFF00)

#define MPI2_HEADER_VERSION_UNIT_SHIFT      (8)
@@ -181,6 +184,7 @@ 
#define MPI2_IOC_STATE_READY               (0x10000000)

#define MPI2_IOC_STATE_OPERATIONAL         (0x20000000)

#define MPI2_IOC_STATE_FAULT               (0x40000000)

#define MPI2_IOC_STATE_COREDUMP            (0x50000000)



#define MPI2_IOC_STATE_MASK                (0xF0000000)

#define MPI2_IOC_STATE_SHIFT               (28)

drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h

+15 −4
Original line number Diff line number Diff line
@@ -249,6 +249,8 @@ 
 * 08-28-18  02.00.46  Added NVMs Write Cache flag to IOUnitPage1

 *                     Added DMDReport Delay Time defines to PCIeIOUnitPage1

 * 12-17-18  02.00.47  Swap locations of Slotx2 and Slotx4 in ManPage 7.

 * 08-01-19  02.00.49  Add MPI26_MANPAGE7_FLAG_X2_X4_SLOT_INFO_VALID

 *                     Add MPI26_IOUNITPAGE1_NVME_WRCACHE_SHIFT

 */



#ifndef MPI2_CNFG_H
@@ -891,6 +893,8 @@ typedef struct _MPI2_CONFIG_PAGE_MAN_7 { 
#define MPI2_MANPAGE7_FLAG_EVENTREPLAY_SLOT_ORDER       (0x00000002)

#define MPI2_MANPAGE7_FLAG_USE_SLOT_INFO                (0x00000001)



#define MPI26_MANPAGE7_FLAG_CONN_LANE_USE_PINOUT        (0x00000020)

#define MPI26_MANPAGE7_FLAG_X2_X4_SLOT_INFO_VALID       (0x00000010)



/*

 *Generic structure to use for product-specific manufacturing pages
@@ -962,9 +966,10 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_1 { 


/* IO Unit Page 1 Flags defines */

#define MPI26_IOUNITPAGE1_NVME_WRCACHE_MASK             (0x00030000)

#define MPI26_IOUNITPAGE1_NVME_WRCACHE_ENABLE           (0x00000000)

#define MPI26_IOUNITPAGE1_NVME_WRCACHE_DISABLE          (0x00010000)

#define MPI26_IOUNITPAGE1_NVME_WRCACHE_NO_CHANGE        (0x00020000)

#define MPI26_IOUNITPAGE1_NVME_WRCACHE_SHIFT            (16)

#define MPI26_IOUNITPAGE1_NVME_WRCACHE_NO_CHANGE        (0x00000000)

#define MPI26_IOUNITPAGE1_NVME_WRCACHE_ENABLE           (0x00010000)

#define MPI26_IOUNITPAGE1_NVME_WRCACHE_DISABLE          (0x00020000)

#define MPI2_IOUNITPAGE1_ATA_SECURITY_FREEZE_LOCK       (0x00004000)

#define MPI25_IOUNITPAGE1_NEW_DEVICE_FAST_PATH_DISABLE  (0x00002000)

#define MPI25_IOUNITPAGE1_DISABLE_FAST_PATH             (0x00001000)
@@ -3931,7 +3936,13 @@ typedef struct _MPI26_CONFIG_PAGE_PCIEDEV_2 { 
	U32	MaximumDataTransferSize;	/*0x0C */

	U32	Capabilities;		/*0x10 */

	U16	NOIOB;		/* 0x14 */

	U16	Reserved2;		/* 0x16 */

	U16     ShutdownLatency;        /* 0x16 */

	U16     VendorID;               /* 0x18 */

	U16     DeviceID;               /* 0x1A */

	U16     SubsystemVendorID;      /* 0x1C */

	U16     SubsystemID;            /* 0x1E */

	U8      RevisionID;             /* 0x20 */

	U8      Reserved21[3];          /* 0x21 */

} MPI26_CONFIG_PAGE_PCIEDEV_2, *PTR_MPI26_CONFIG_PAGE_PCIEDEV_2,

	Mpi26PCIeDevicePage2_t, *pMpi26PCIeDevicePage2_t;

drivers/scsi/mpt3sas/mpi/mpi2_image.h

+7 −0
Original line number Diff line number Diff line
@@ -19,6 +19,10 @@ 
 * 09-07-18  02.06.03  Added MPI26_EVENT_PCIE_TOPO_PI_16_LANES

 * 12-17-18  02.06.04  Addd MPI2_EXT_IMAGE_TYPE_PBLP

 *			Shorten some defines to be compatible with DOS

 * 06-24-19  02.06.05  Whitespace adjustments to help with identifier

 *			checking tool.

 * 10-02-19  02.06.06  Added MPI26_IMAGE_HEADER_SIG1_COREDUMP

 *                     Added MPI2_FLASH_REGION_COREDUMP

 */

#ifndef MPI2_IMAGE_H

#define MPI2_IMAGE_H
@@ -213,6 +217,8 @@ typedef struct _MPI26_COMPONENT_IMAGE_HEADER { 
#define MPI26_IMAGE_HEADER_SIG1_NVDATA                   (0x5444564E)

#define MPI26_IMAGE_HEADER_SIG1_GAS_GAUGE                (0x20534147)

#define MPI26_IMAGE_HEADER_SIG1_PBLP                     (0x504C4250)

/* little-endian "DUMP" */

#define MPI26_IMAGE_HEADER_SIG1_COREDUMP                 (0x504D5544)



/**** Definitions for Signature2 field ****/

#define MPI26_IMAGE_HEADER_SIGNATURE2_VALUE                    (0x50584546)
@@ -359,6 +365,7 @@ typedef struct _MPI2_FLASH_LAYOUT_DATA { 
#define MPI2_FLASH_REGION_MR_NVDATA             (0x14)

#define MPI2_FLASH_REGION_CPLD                  (0x15)

#define MPI2_FLASH_REGION_PSOC                  (0x16)

#define MPI2_FLASH_REGION_COREDUMP              (0x17)



/*ImageRevision */

#define MPI2_FLASH_LAYOUT_IMAGE_REVISION        (0x00)

drivers/scsi/mpt3sas/mpi/mpi2_ioc.h

+7 −1
Original line number Diff line number Diff line
@@ -175,6 +175,10 @@ 
 *                     Moved FW image definitions ionto new mpi2_image,h

 * 08-14-18   02.00.36 Fixed definition of MPI2_FW_DOWNLOAD_ITYPE_PSOC (0x16)

 * 09-07-18   02.00.37 Added MPI26_EVENT_PCIE_TOPO_PI_16_LANES

 * 10-02-19   02.00.38 Added MPI26_IOCINIT_CFGFLAGS_COREDUMP_ENABLE

 *                     Added MPI26_IOCFACTS_CAPABILITY_COREDUMP_ENABLED

 *                     Added MPI2_FW_DOWNLOAD_ITYPE_COREDUMP

 *                     Added MPI2_FW_UPLOAD_ITYPE_COREDUMP

 * --------------------------------------------------------------------------

 */
@@ -248,6 +252,7 @@ typedef struct _MPI2_IOC_INIT_REQUEST { 


/*ConfigurationFlags */

#define MPI26_IOCINIT_CFGFLAGS_NVME_SGL_FORMAT  (0x0001)

#define MPI26_IOCINIT_CFGFLAGS_COREDUMP_ENABLE  (0x0002)



/*minimum depth for a Reply Descriptor Post Queue */

#define MPI2_RDPQ_DEPTH_MIN                     (16)
@@ -377,6 +382,7 @@ typedef struct _MPI2_IOC_FACTS_REPLY { 
/*ProductID field uses MPI2_FW_HEADER_PID_ */



/*IOCCapabilities */

#define MPI26_IOCFACTS_CAPABILITY_COREDUMP_ENABLED      (0x00200000)

#define MPI26_IOCFACTS_CAPABILITY_PCIE_SRIOV            (0x00100000)

#define MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ            (0x00080000)

#define MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE     (0x00040000)
@@ -1458,8 +1464,8 @@ typedef struct _MPI2_FW_DOWNLOAD_REQUEST { 
/*MPI v2.6 and newer */

#define MPI2_FW_DOWNLOAD_ITYPE_CPLD                 (0x15)

#define MPI2_FW_DOWNLOAD_ITYPE_PSOC                 (0x16)

#define MPI2_FW_DOWNLOAD_ITYPE_COREDUMP             (0x17)

#define MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC (0xF0)

#define MPI2_FW_DOWNLOAD_ITYPE_TERMINATE            (0xFF)



/*MPI v2.0 FWDownload TransactionContext Element */

typedef struct _MPI2_FW_DOWNLOAD_TCSGE {

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