Commit 158d4958 authored by Will Deacon's avatar Will Deacon
Browse files

arm64: mm: Rename post_ttbr0_update_workaround 



The post_ttbr0_update_workaround hook applies to any change to TTBRx_EL1.
Since we're using TTBR1 for the ASID, rename the hook to make it clearer
as to what it's doing.

Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Tested-by: default avatarLaura Abbott <labbott@redhat.com>
Tested-by: default avatarShanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 85d13c00

arch/arm64/include/asm/assembler.h

+2 −3
Original line number Diff line number Diff line
@@ -477,10 +477,9 @@ alternative_endif 
	.endm



/*

/*

 * Errata workaround post TTBR0_EL1 update.

 * Errata workaround post TTBRx_EL1 update.

 */

	.macro	post_ttbr0_update_workaround

	.macro	post_ttbr_update_workaround

#ifdef CONFIG_CAVIUM_ERRATUM_27456

alternative_if ARM64_WORKAROUND_CAVIUM_27456

	ic	iallu

arch/arm64/kernel/entry.S

+1 −1
Original line number Diff line number Diff line
@@ -257,7 +257,7 @@ alternative_else_nop_endif 
	 * Cavium erratum 27456 (broadcast TLBI instructions may cause I-cache

	 * corruption).

	 */

	post_ttbr0_update_workaround

	post_ttbr_update_workaround

	.endif

1:

	.if	\el != 0

arch/arm64/mm/proc.S

+1 −1
Original line number Diff line number Diff line
@@ -145,7 +145,7 @@ ENTRY(cpu_do_switch_mm) 
	isb

	msr	ttbr0_el1, x0			// now update TTBR0

	isb

	post_ttbr0_update_workaround

	post_ttbr_update_workaround

	ret

ENDPROC(cpu_do_switch_mm)

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