drm/nouveau/devinit: convert to new-style nvkm_subdev (151abd44) · Commits · 戴 / test

drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/init.h

+1 −0

Original line number	Diff line number	Diff line
		#ifndef __NVBIOS_INIT_H__
		#define __NVBIOS_INIT_H__

		struct nvbios_init {
		struct nvkm_subdev *subdev;
		struct nvkm_bios *bios;

drivers/gpu/drm/nouveau/include/nvkm/subdev/devinit.h

+19 −21

Original line number	Diff line number	Diff line
		#ifndef __NVKM_DEVINIT_H__
		#define __NVKM_DEVINIT_H__
		#include <core/subdev.h>
		struct nvkm_devinit;

		struct nvkm_devinit {
		const struct nvkm_devinit_func *func;
		struct nvkm_subdev subdev;
		bool post;
		void (meminit)(struct nvkm_devinit );
		int (pll_set)(struct nvkm_devinit , u32 type, u32 freq);
		u32 (mmio)(struct nvkm_devinit , u32 addr);
		};

		static inline struct nvkm_devinit *
		nvkm_devinit(void *obj)
		{
		return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_DEVINIT);
		}
		u32 nvkm_devinit_mmio(struct nvkm_devinit *, u32 addr);
		int nvkm_devinit_pll_set(struct nvkm_devinit *, u32 type, u32 khz);
		void nvkm_devinit_meminit(struct nvkm_devinit *);
		u64 nvkm_devinit_disable(struct nvkm_devinit *);

		extern struct nvkm_oclass *nv04_devinit_oclass;
		extern struct nvkm_oclass *nv05_devinit_oclass;
		extern struct nvkm_oclass *nv10_devinit_oclass;
		extern struct nvkm_oclass *nv1a_devinit_oclass;
		extern struct nvkm_oclass *nv20_devinit_oclass;
		extern struct nvkm_oclass *nv50_devinit_oclass;
		extern struct nvkm_oclass *g84_devinit_oclass;
		extern struct nvkm_oclass *g98_devinit_oclass;
		extern struct nvkm_oclass *gt215_devinit_oclass;
		extern struct nvkm_oclass *mcp89_devinit_oclass;
		extern struct nvkm_oclass *gf100_devinit_oclass;
		extern struct nvkm_oclass *gm107_devinit_oclass;
		extern struct nvkm_oclass *gm204_devinit_oclass;
		int nv04_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int nv05_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int nv10_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int nv1a_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int nv20_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int nv50_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int g84_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int g98_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int gt215_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int mcp89_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int gf100_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int gm107_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		int gm204_devinit_new(struct nvkm_device , int, struct nvkm_devinit *);
		#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+67 −67

Original line number	Diff line number	Diff line
		@@ -79,7 +79,7 @@ nv4_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv04_devinit_new,
		.devinit = nv04_devinit_new,
		// .fb = nv04_fb_new,
		// .i2c = nv04_i2c_new,
		// .imem = nv04_instmem_new,
		@@ -99,7 +99,7 @@ nv5_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv05_devinit_new,
		.devinit = nv05_devinit_new,
		// .fb = nv04_fb_new,
		// .i2c = nv04_i2c_new,
		// .imem = nv04_instmem_new,
		@@ -119,7 +119,7 @@ nv10_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		.devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -138,7 +138,7 @@ nv11_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		.devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -159,7 +159,7 @@ nv15_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		.devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -180,7 +180,7 @@ nv17_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		.devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -201,7 +201,7 @@ nv18_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		.devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -222,7 +222,7 @@ nv1a_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv1a_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -243,7 +243,7 @@ nv1f_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv1a_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -264,7 +264,7 @@ nv20_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		.devinit = nv20_devinit_new,
		// .fb = nv20_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -285,7 +285,7 @@ nv25_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		.devinit = nv20_devinit_new,
		// .fb = nv25_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -306,7 +306,7 @@ nv28_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		.devinit = nv20_devinit_new,
		// .fb = nv25_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -327,7 +327,7 @@ nv2a_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		.devinit = nv20_devinit_new,
		// .fb = nv25_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -348,7 +348,7 @@ nv30_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		.devinit = nv20_devinit_new,
		// .fb = nv30_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -369,7 +369,7 @@ nv31_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		.devinit = nv20_devinit_new,
		// .fb = nv30_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -391,7 +391,7 @@ nv34_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		.devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -413,7 +413,7 @@ nv35_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		.devinit = nv20_devinit_new,
		// .fb = nv35_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -434,7 +434,7 @@ nv36_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		.devinit = nv20_devinit_new,
		// .fb = nv36_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -456,7 +456,7 @@ nv40_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv40_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -481,7 +481,7 @@ nv41_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv41_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -506,7 +506,7 @@ nv42_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv41_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -531,7 +531,7 @@ nv43_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv41_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -556,7 +556,7 @@ nv44_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv44_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -581,7 +581,7 @@ nv45_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv40_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -606,7 +606,7 @@ nv46_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -631,7 +631,7 @@ nv47_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv47_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -656,7 +656,7 @@ nv49_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv49_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -681,7 +681,7 @@ nv4a_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv44_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -706,7 +706,7 @@ nv4b_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv49_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -731,7 +731,7 @@ nv4c_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -756,7 +756,7 @@ nv4e_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv4e_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv4e_i2c_new,
		@@ -782,7 +782,7 @@ nv50_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv50_bus_new,
		.clk = nv50_clk_new,
		// .devinit = nv50_devinit_new,
		.devinit = nv50_devinit_new,
		// .fb = nv50_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = nv50_gpio_new,
		@@ -809,7 +809,7 @@ nv63_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -834,7 +834,7 @@ nv67_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -859,7 +859,7 @@ nv68_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		.devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		// .i2c = nv04_i2c_new,
		@@ -885,7 +885,7 @@ nv84_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv50_bus_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		.devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = nv50_gpio_new,
		@@ -916,7 +916,7 @@ nv86_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv50_bus_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		.devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = nv50_gpio_new,
		@@ -947,7 +947,7 @@ nv92_chipset = {
		.bios = nvkm_bios_new,
		.bus = nv50_bus_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		.devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = nv50_gpio_new,
		@@ -978,7 +978,7 @@ nv94_chipset = {
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		.devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1012,7 +1012,7 @@ nv96_chipset = {
		.clk = g84_clk_new,
		// .therm = g84_therm_new,
		// .mxm = nv50_mxm_new,
		// .devinit = g84_devinit_new,
		.devinit = g84_devinit_new,
		// .mc = g94_mc_new,
		.bus = g94_bus_new,
		// .timer = nv04_timer_new,
		@@ -1043,7 +1043,7 @@ nv98_chipset = {
		.clk = g84_clk_new,
		// .therm = g84_therm_new,
		// .mxm = nv50_mxm_new,
		// .devinit = g98_devinit_new,
		.devinit = g98_devinit_new,
		// .mc = g98_mc_new,
		.bus = g94_bus_new,
		// .timer = nv04_timer_new,
		@@ -1071,7 +1071,7 @@ nva0_chipset = {
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		.devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1102,7 +1102,7 @@ nva3_chipset = {
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		.clk = gt215_clk_new,
		// .devinit = gt215_devinit_new,
		.devinit = gt215_devinit_new,
		// .fb = gt215_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1135,7 +1135,7 @@ nva5_chipset = {
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		.clk = gt215_clk_new,
		// .devinit = gt215_devinit_new,
		.devinit = gt215_devinit_new,
		// .fb = gt215_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1167,7 +1167,7 @@ nva8_chipset = {
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		.clk = gt215_clk_new,
		// .devinit = gt215_devinit_new,
		.devinit = gt215_devinit_new,
		// .fb = gt215_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1199,7 +1199,7 @@ nvaa_chipset = {
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		.clk = mcp77_clk_new,
		// .devinit = g98_devinit_new,
		.devinit = g98_devinit_new,
		// .fb = mcp77_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1230,7 +1230,7 @@ nvac_chipset = {
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		.clk = mcp77_clk_new,
		// .devinit = g98_devinit_new,
		.devinit = g98_devinit_new,
		// .fb = mcp77_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1261,7 +1261,7 @@ nvaf_chipset = {
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		.clk = gt215_clk_new,
		// .devinit = mcp89_devinit_new,
		.devinit = mcp89_devinit_new,
		// .fb = mcp89_fb_new,
		// .fuse = nv50_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1293,7 +1293,7 @@ nvc0_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1328,7 +1328,7 @@ nvc1_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1362,7 +1362,7 @@ nvc3_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1396,7 +1396,7 @@ nvc4_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1431,7 +1431,7 @@ nvc8_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1466,7 +1466,7 @@ nvce_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1501,7 +1501,7 @@ nvcf_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = g94_gpio_new,
		@@ -1535,7 +1535,7 @@ nvd7_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gf110_gpio_new,
		@@ -1567,7 +1567,7 @@ nvd9_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gf110_gpio_new,
		@@ -1601,7 +1601,7 @@ nve4_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1637,7 +1637,7 @@ nve6_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1673,7 +1673,7 @@ nve7_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1733,7 +1733,7 @@ nvf0_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1769,7 +1769,7 @@ nvf1_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1805,7 +1805,7 @@ nv106_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1840,7 +1840,7 @@ nv108_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		.devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1875,7 +1875,7 @@ nv117_chipset = {
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		.clk = gk104_clk_new,
		// .devinit = gm107_devinit_new,
		.devinit = gm107_devinit_new,
		// .fb = gm107_fb_new,
		// .fuse = gm107_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1904,7 +1904,7 @@ nv124_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .devinit = gm204_devinit_new,
		.devinit = gm204_devinit_new,
		// .fb = gm107_fb_new,
		// .fuse = gm107_fuse_new,
		// .gpio = gk104_gpio_new,
		@@ -1933,7 +1933,7 @@ nv126_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .devinit = gm204_devinit_new,
		.devinit = gm204_devinit_new,
		// .fb = gm107_fb_new,
		// .fuse = gm107_fuse_new,
		// .gpio = gk104_gpio_new,

drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c

+0 −9

Original line number	Diff line number	Diff line
		@@ -33,7 +33,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
		@@ -61,7 +60,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
		@@ -89,7 +87,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
		@@ -116,7 +113,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
		@@ -144,7 +140,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
		@@ -171,7 +166,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
		@@ -198,7 +192,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
		@@ -226,7 +219,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
		@@ -253,7 +245,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c

+0 −7

Original line number	Diff line number	Diff line
		@@ -33,7 +33,6 @@ gk104_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
		@@ -62,7 +61,6 @@ gk104_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
		@@ -91,7 +89,6 @@ gk104_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
		@@ -138,7 +135,6 @@ gk104_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
		@@ -167,7 +163,6 @@ gk104_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
		@@ -196,7 +191,6 @@ gk104_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
		@@ -224,7 +218,6 @@ gk104_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;

Admin message