drm/nouveau/clk: convert to new-style nvkm_subdev (6625f55c) · Commits · 戴 / test

drivers/gpu/drm/nouveau/include/nvif/device.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -55,7 +55,7 @@ u64 nvif_device_time(struct nvif_device *);
		#define nvxx_mmu(a) nvkm_mmu(nvxx_device(a))
		#define nvxx_bar(a) nvxx_device(a)->bar
		#define nvxx_gpio(a) nvkm_gpio(nvxx_device(a))
		#define nvxx_clk(a) nvkm_clk(nvxx_device(a))
		#define nvxx_clk(a) nvxx_device(a)->clk
		#define nvxx_i2c(a) nvkm_i2c(nvxx_device(a))
		#define nvxx_therm(a) nvkm_therm(nvxx_device(a))

drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

+14 −54

Original line number	Diff line number	Diff line
		@@ -71,9 +71,10 @@ struct nvkm_domain {
		};

		struct nvkm_clk {
		const struct nvkm_clk_func *func;
		struct nvkm_subdev subdev;

		struct nvkm_domain *domains;
		const struct nvkm_domain *domains;
		struct nvkm_pstate bstate;

		struct list_head states;
		@@ -94,68 +95,27 @@ struct nvkm_clk {

		bool allow_reclock;

		int (read)(struct nvkm_clk , enum nv_clk_src);
		int (calc)(struct nvkm_clk , struct nvkm_cstate *);
		int (prog)(struct nvkm_clk );
		void (tidy)(struct nvkm_clk );

		/XXX: die, these are here only* to support the completely
		* bat-shit insane what-was-nvkm_hw.c code
		* bat-shit insane what-was-nouveau_hw.c code
		*/
		int (pll_calc)(struct nvkm_clk , struct nvbios_pll *, int clk,
		struct nvkm_pll_vals *pv);
		int (pll_prog)(struct nvkm_clk , u32 reg1, struct nvkm_pll_vals *pv);
		};

		static inline struct nvkm_clk *
		nvkm_clk(void *obj)
		{
		return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_CLK);
		}

		#define nvkm_clk_create(p,e,o,i,r,s,n,d) \
		nvkm_clk_create_((p), (e), (o), (i), (r), (s), (n), sizeof(**d), \
		(void **)d)
		#define nvkm_clk_destroy(p) ({ \
		struct nvkm_clk *_clk = (p); \
		_nvkm_clk_dtor(nv_object(_clk)); \
		})
		#define nvkm_clk_init(p) ({ \
		struct nvkm_clk *_clk = (p); \
		_nvkm_clk_init(nv_object(_clk)); \
		})
		#define nvkm_clk_fini(p,s) ({ \
		struct nvkm_clk *_clk = (p); \
		_nvkm_clk_fini(nv_object(_clk), (s)); \
		})

		int nvkm_clk_create_(struct nvkm_object , struct nvkm_object ,
		struct nvkm_oclass *,
		struct nvkm_domain , struct nvkm_pstate ,
		int, bool, int, void **);
		void _nvkm_clk_dtor(struct nvkm_object *);
		int _nvkm_clk_init(struct nvkm_object *);
		int _nvkm_clk_fini(struct nvkm_object *, bool);

		extern struct nvkm_oclass nv04_clk_oclass;
		extern struct nvkm_oclass nv40_clk_oclass;
		extern struct nvkm_oclass *nv50_clk_oclass;
		extern struct nvkm_oclass *g84_clk_oclass;
		extern struct nvkm_oclass *mcp77_clk_oclass;
		extern struct nvkm_oclass gt215_clk_oclass;
		extern struct nvkm_oclass gf100_clk_oclass;
		extern struct nvkm_oclass gk104_clk_oclass;
		extern struct nvkm_oclass gk20a_clk_oclass;

		int nv04_clk_pll_set(struct nvkm_clk *, u32 type, u32 freq);
		int nv04_clk_pll_calc(struct nvkm_clk , struct nvbios_pll , int clk,
		struct nvkm_pll_vals *);
		int nv04_clk_pll_prog(struct nvkm_clk , u32 reg1, struct nvkm_pll_vals );
		int gt215_clk_pll_calc(struct nvkm_clk , struct nvbios_pll ,
		int clk, struct nvkm_pll_vals *);

		int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src);
		int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);
		int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);
		int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);
		int nvkm_clk_tstate(struct nvkm_clk *, int req, int rel);

		int nv04_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		int nv40_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		int nv50_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		int g84_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		int mcp77_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		int gt215_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		int gf100_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		int gk104_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		int gk20a_clk_new(struct nvkm_device , int, struct nvkm_clk *);
		#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+66 −66

Original line number	Diff line number	Diff line
		@@ -78,7 +78,7 @@ nv4_chipset = {
		.name = "NV04",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv04_devinit_new,
		// .fb = nv04_fb_new,
		// .i2c = nv04_i2c_new,
		@@ -98,7 +98,7 @@ nv5_chipset = {
		.name = "NV05",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv05_devinit_new,
		// .fb = nv04_fb_new,
		// .i2c = nv04_i2c_new,
		@@ -118,7 +118,7 @@ nv10_chipset = {
		.name = "NV10",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -137,7 +137,7 @@ nv11_chipset = {
		.name = "NV11",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -158,7 +158,7 @@ nv15_chipset = {
		.name = "NV15",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -179,7 +179,7 @@ nv17_chipset = {
		.name = "NV17",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -200,7 +200,7 @@ nv18_chipset = {
		.name = "NV18",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -221,7 +221,7 @@ nv1a_chipset = {
		.name = "nForce",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv1a_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -242,7 +242,7 @@ nv1f_chipset = {
		.name = "nForce2",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv1a_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -263,7 +263,7 @@ nv20_chipset = {
		.name = "NV20",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		// .fb = nv20_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -284,7 +284,7 @@ nv25_chipset = {
		.name = "NV25",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		// .fb = nv25_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -305,7 +305,7 @@ nv28_chipset = {
		.name = "NV28",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		// .fb = nv25_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -326,7 +326,7 @@ nv2a_chipset = {
		.name = "NV2A",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		// .fb = nv25_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -347,7 +347,7 @@ nv30_chipset = {
		.name = "NV30",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		// .fb = nv30_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -368,7 +368,7 @@ nv31_chipset = {
		.name = "NV31",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		// .fb = nv30_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -390,7 +390,7 @@ nv34_chipset = {
		.name = "NV34",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv10_devinit_new,
		// .fb = nv10_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -412,7 +412,7 @@ nv35_chipset = {
		.name = "NV35",
		.bios = nvkm_bios_new,
		.bus = nv04_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		// .fb = nv35_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -433,7 +433,7 @@ nv36_chipset = {
		.name = "NV36",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv04_clk_new,
		.clk = nv04_clk_new,
		// .devinit = nv20_devinit_new,
		// .fb = nv36_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -455,7 +455,7 @@ nv40_chipset = {
		.name = "NV40",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv40_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -480,7 +480,7 @@ nv41_chipset = {
		.name = "NV41",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv41_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -505,7 +505,7 @@ nv42_chipset = {
		.name = "NV42",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv41_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -530,7 +530,7 @@ nv43_chipset = {
		.name = "NV43",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv41_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -555,7 +555,7 @@ nv44_chipset = {
		.name = "NV44",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv44_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -580,7 +580,7 @@ nv45_chipset = {
		.name = "NV45",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv40_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -605,7 +605,7 @@ nv46_chipset = {
		.name = "G72",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -630,7 +630,7 @@ nv47_chipset = {
		.name = "G70",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv47_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -655,7 +655,7 @@ nv49_chipset = {
		.name = "G71",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv49_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -680,7 +680,7 @@ nv4a_chipset = {
		.name = "NV44A",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv44_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -705,7 +705,7 @@ nv4b_chipset = {
		.name = "G73",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv49_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -730,7 +730,7 @@ nv4c_chipset = {
		.name = "C61",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -755,7 +755,7 @@ nv4e_chipset = {
		.name = "C51",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv4e_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -781,7 +781,7 @@ nv50_chipset = {
		.bar = nv50_bar_new,
		.bios = nvkm_bios_new,
		.bus = nv50_bus_new,
		// .clk = nv50_clk_new,
		.clk = nv50_clk_new,
		// .devinit = nv50_devinit_new,
		// .fb = nv50_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -808,7 +808,7 @@ nv63_chipset = {
		.name = "C73",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -833,7 +833,7 @@ nv67_chipset = {
		.name = "C67",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -858,7 +858,7 @@ nv68_chipset = {
		.name = "C68",
		.bios = nvkm_bios_new,
		.bus = nv31_bus_new,
		// .clk = nv40_clk_new,
		.clk = nv40_clk_new,
		// .devinit = nv1a_devinit_new,
		// .fb = nv46_fb_new,
		// .gpio = nv10_gpio_new,
		@@ -884,7 +884,7 @@ nv84_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = nv50_bus_new,
		// .clk = g84_clk_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -915,7 +915,7 @@ nv86_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = nv50_bus_new,
		// .clk = g84_clk_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -946,7 +946,7 @@ nv92_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = nv50_bus_new,
		// .clk = g84_clk_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -977,7 +977,7 @@ nv94_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		// .clk = g84_clk_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -1009,7 +1009,7 @@ nv96_chipset = {
		// .gpio = g94_gpio_new,
		// .i2c = g94_i2c_new,
		// .fuse = nv50_fuse_new,
		// .clk = g84_clk_new,
		.clk = g84_clk_new,
		// .therm = g84_therm_new,
		// .mxm = nv50_mxm_new,
		// .devinit = g84_devinit_new,
		@@ -1040,7 +1040,7 @@ nv98_chipset = {
		// .gpio = g94_gpio_new,
		// .i2c = g94_i2c_new,
		// .fuse = nv50_fuse_new,
		// .clk = g84_clk_new,
		.clk = g84_clk_new,
		// .therm = g84_therm_new,
		// .mxm = nv50_mxm_new,
		// .devinit = g98_devinit_new,
		@@ -1070,7 +1070,7 @@ nva0_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		// .clk = g84_clk_new,
		.clk = g84_clk_new,
		// .devinit = g84_devinit_new,
		// .fb = g84_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -1101,7 +1101,7 @@ nva3_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		// .clk = gt215_clk_new,
		.clk = gt215_clk_new,
		// .devinit = gt215_devinit_new,
		// .fb = gt215_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -1134,7 +1134,7 @@ nva5_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		// .clk = gt215_clk_new,
		.clk = gt215_clk_new,
		// .devinit = gt215_devinit_new,
		// .fb = gt215_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -1166,7 +1166,7 @@ nva8_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		// .clk = gt215_clk_new,
		.clk = gt215_clk_new,
		// .devinit = gt215_devinit_new,
		// .fb = gt215_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -1198,7 +1198,7 @@ nvaa_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		// .clk = mcp77_clk_new,
		.clk = mcp77_clk_new,
		// .devinit = g98_devinit_new,
		// .fb = mcp77_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -1229,7 +1229,7 @@ nvac_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		// .clk = mcp77_clk_new,
		.clk = mcp77_clk_new,
		// .devinit = g98_devinit_new,
		// .fb = mcp77_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -1260,7 +1260,7 @@ nvaf_chipset = {
		.bar = g84_bar_new,
		.bios = nvkm_bios_new,
		.bus = g94_bus_new,
		// .clk = gt215_clk_new,
		.clk = gt215_clk_new,
		// .devinit = mcp89_devinit_new,
		// .fb = mcp89_fb_new,
		// .fuse = nv50_fuse_new,
		@@ -1292,7 +1292,7 @@ nvc0_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1327,7 +1327,7 @@ nvc1_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1361,7 +1361,7 @@ nvc3_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1395,7 +1395,7 @@ nvc4_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1430,7 +1430,7 @@ nvc8_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1465,7 +1465,7 @@ nvce_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1500,7 +1500,7 @@ nvcf_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1534,7 +1534,7 @@ nvd7_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1566,7 +1566,7 @@ nvd9_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gf100_clk_new,
		.clk = gf100_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gf100_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1600,7 +1600,7 @@ nve4_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gk104_clk_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1636,7 +1636,7 @@ nve6_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gk104_clk_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1672,7 +1672,7 @@ nve7_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gk104_clk_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1707,7 +1707,7 @@ nvea_chipset = {
		.name = "GK20A",
		.bar = gk20a_bar_new,
		.bus = gf100_bus_new,
		// .clk = gk20a_clk_new,
		.clk = gk20a_clk_new,
		// .fb = gk20a_fb_new,
		// .fuse = gf100_fuse_new,
		// .ibus = gk20a_ibus_new,
		@@ -1732,7 +1732,7 @@ nvf0_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gk104_clk_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1768,7 +1768,7 @@ nvf1_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gk104_clk_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1804,7 +1804,7 @@ nv106_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gk104_clk_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1839,7 +1839,7 @@ nv108_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gk104_clk_new,
		.clk = gk104_clk_new,
		// .devinit = gf100_devinit_new,
		// .fb = gk104_fb_new,
		// .fuse = gf100_fuse_new,
		@@ -1874,7 +1874,7 @@ nv117_chipset = {
		.bar = gf100_bar_new,
		.bios = nvkm_bios_new,
		.bus = gf100_bus_new,
		// .clk = gk104_clk_new,
		.clk = gk104_clk_new,
		// .devinit = gm107_devinit_new,
		// .fb = gm107_fb_new,
		// .fuse = gm107_fuse_new,

drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -70,7 +70,7 @@ nvkm_control_mthd_pstate_attr(struct nvkm_control ctrl, void data, u32 size)
		struct nvif_control_pstate_attr_v0 v0;
		} *args = data;
		struct nvkm_clk *clk = ctrl->device->clk;
		struct nvkm_domain *domain;
		const struct nvkm_domain *domain;
		struct nvkm_pstate *pstate;
		struct nvkm_cstate *cstate;
		int i = 0, j = -1;
		@@ -116,7 +116,7 @@ nvkm_control_mthd_pstate_attr(struct nvkm_control ctrl, void data, u32 size)

		args->v0.state = pstate->pstate;
		} else {
		lo = max(clk->read(clk, domain->name), 0);
		lo = max(nvkm_clk_read(clk, domain->name), 0);
		hi = lo;
		}

drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c

+0 −9

Original line number	Diff line number	Diff line
		@@ -31,7 +31,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		@@ -60,7 +59,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		@@ -89,7 +87,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		@@ -117,7 +114,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		@@ -146,7 +142,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		@@ -174,7 +169,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		@@ -202,7 +196,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		@@ -231,7 +224,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
		@@ -259,7 +251,6 @@ gf100_identify(struct nvkm_device *device)
		device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass;
		device->oclass[NVDEV_SUBDEV_I2C ] = gf117_i2c_oclass;
		device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
		device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
		device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
		device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
		device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;

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