Commit 121d760d authored Dec 29, 2017 by Zhi Wang Committed by Zhenyu Wang Jan 04, 2018

drm/i915/gvt: Clear the shadow page table entry after post-sync



A shadow page table entry needs to be cleared after being set as
post-sync. This patch fixes the recent error reported in Win7-32 test.

Fixes: 2707e444 ("drm/i915/gvt: vGPU graphics memory virtualization")
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
CC: Stable <stable@vger.kernel.org>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

parent f5f00e7d

drivers/gpu/drm/i915/gvt/gtt.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -1359,12 +1359,15 @@ static int ppgtt_handle_guest_write_page_table_bytes(void *gp,
		return ret;
		} else {
		if (!test_bit(index, spt->post_shadow_bitmap)) {
		int type = spt->shadow_page.type;

		ppgtt_get_shadow_entry(spt, &se, index);
		ret = ppgtt_handle_guest_entry_removal(gpt, &se, index);
		if (ret)
		return ret;
		ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn);
		ppgtt_set_shadow_entry(spt, &se, index);
		}

		ppgtt_set_post_shadow(spt, index);
		}

Admin message